Find your dream job NOW!

Click on Location links to filter by Job Title & Location.
Click on Company links to filter by Company & Location.
For exact match, enclose search terms in "double quotes".

Keywords: High-Speed CMOS DAC/ADC/PLL Analog Design Engineer, Location: San Jose, CA

Page: 1

High-Speed CMOS DAC/ADC/PLL Analog Design Engineer

High-Speed CMOS DAC/ADC/PLL Analog Design Engineer Locations: Irvine, CA, San Jose, CA or possibly remote US Citizen... implementation Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc) High-speed analog circuit design...

Location: San Jose, CA
Posted Date: 29 Jan 2026

High Speed Mixed Signal Circuit Design Engineer

. Must have experiences in bringing high performance analog IPs including but not limited to high-speed ADC, high-speed DAC, and high....​ The successful candidate shall possess the capability to design and analyze high-speed, high-performance analog/mixed...

Company: Nokia
Location: San Jose, CA
Posted Date: 08 Nov 2025

SERDES Analog Design Engineer/ Architect

in high speed ADC and/or DAC Experience in advanced PDK design ACADEMIC CREDENTIALS: PhD in Electrical Engineering... and modeling. Circuit design spec definition of transceiver building blocks (ADC, DAC, PLL, clock distribution, receiver front-end...

Posted Date: 16 Jan 2026

Senior Analog Design Engineer

in high speed ADC and/or DAC Experience in advanced PDK design ACADEMIC CREDENTIALS: PhD in Electrical Engineering... and modeling. Circuit design spec definition of transceiver building blocks (ADC, DAC, PLL, clock distribution, receiver front-end...

Posted Date: 20 Dec 2025