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Keywords: IC Verification Engineer, Location: San Jose, CA

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IC Verification Engineer

features. Architect and develop scalable and re-usable testbenches, using the framework of the verification methodology Build... gaps and improve tests to cover the gaps Document verification strategy including Test plans, Verification Environment...

Company: Broadcom
Location: San Jose, CA
Posted Date: 31 Dec 2025
Salary: $120000 - 192000 per year

IC Verification Engineer

of Verification Methodologies. Drive Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.... Build pseudo-random tests to verify and get to full Functional coverage and bring the Verification to closure Debug...

Company: Broadcom
Location: San Jose, CA
Posted Date: 18 Dec 2025

Sr AMS Pre-Silicon Verification Engineer

is looking for a highly motivated AMS Pre-Silicon Verification Engineer to join our expanding team of analog/mixed-signal IC experts...Job Title: Sr AMS Pre-Silicon Verification Engineer Location: San Jose CA (Onsite) Full-time: Salary + Benefits...

Company: Encore Semi
Location: San Jose, CA
Posted Date: 22 Feb 2026
Salary: $140000 - 160000 per year

Sr AMS Pre-Silicon Verification Engineer

is looking for a highly motivated AMS Pre-Silicon Verification Engineer to join our expanding team of analog/mixed-signal IC experts...Job Title: Sr AMS Pre-Silicon Verification Engineer Location: San Jose CA (Onsite) Full-time: Salary + Benefits...

Company: Encore Semi
Location: San Jose, CA
Posted Date: 22 Feb 2026
Salary: $140000 - 160000 per year

RTL IC Design Engineer

Broadcom is searching for a Digital IC Design Engineer to join the Data Center Solutions Group at our main campus... functional teams such as Verification Engineering, Software/Firmware Engineering, Emulation Engineering, and Validation...

Company: Broadcom
Location: San Jose, CA
Posted Date: 25 Feb 2026
Salary: $108000 - 172800 per year

IC DESIGN ENGINEER

ASIC/Layout Design Engineer: Oversees definition, design, verification, and documentation for ASIC development... on low power IC design is desirable. Good knowledge on physical verification using Mentor’s Calibre tool. Minimum...

Company: Broadcom
Location: San Jose, CA
Posted Date: 19 Dec 2025
Salary: $120000 - 192000 per year

Physical IC Design Engineer

Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group. This position involves...: Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure Setup and Synthesizing RTL Timing closure...

Company: Broadcom
Location: San Jose, CA
Posted Date: 11 Dec 2025
Salary: $120000 - 192000 per year

Physical IC Design Engineer

Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group. This position involves...: Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure Setup and Synthesizing RTL Timing closure...

Company: Broadcom
Location: San Jose, CA
Posted Date: 11 Dec 2025
Salary: $120000 - 192000 per year

Senior Engineer Digital IC Design

Have experience on verification/debugging activities Knowledge of Ethernet protocol or previous experience with network IC development... optimal timing, area, performance, and power goals Develop and execute verification plans to verify the correctness of digital...

Company: Infineon
Location: San Jose, CA
Posted Date: 07 Jan 2026

R&D Engineer IC Design

Engineer will be responsible for verification of complex switch designs. Responsibilities will include creating... SystemVerilog-based verification environments (testbenches, checkers, transactors) as well as creating and executing testplans...

Company: Broadcom
Location: San Jose, CA
Posted Date: 04 Feb 2026
Salary: $108000 - 172800 per year

Principal Analog/Mixed-Signal IC Design Engineer

, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification...

Company: Western Digital
Location: San Jose, CA
Posted Date: 19 Feb 2026
Salary: $145800 - 194400 per year

Principal Analog/Mixed-Signal IC Design Engineer

, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification...

Company: Western Digital
Location: San Jose, CA
Posted Date: 18 Feb 2026

Application Engineer

Job Description: Job Description We are seeking an application engineer who will deliver technical expertise... for digital, mixed-signal, analog and RF IC device testing solution implementation to customer based on Advantest 93K products...

Company: Advantest
Location: San Jose, CA
Posted Date: 04 Feb 2026

Lead Software Engineer (Computational Electromagnetics, Numerical Analysis, Field Solver)

in semiconductor and electronic design, verification, and analysis. With its Sigrity platform, Cadence is the leader in providing... software for IC package physical design and for analyzing power integrity, signal integrity and design stage electromagnetic...

Posted Date: 17 Jan 2026
Salary: $114800 - 213200 per year

Senior Silicon Design Engineer

your career. SENIOR SILICON DESIGN ENGINEER THE ROLE: We are seeking a highly motivated and experienced Senior Silicon... Design Engineer to join our AECG SIT team. This role involves leading and contributing to the design, integration...

Posted Date: 14 Jan 2026

Graduate - Senior Engineer Systems

selection, and design guidelines Collaboration: Partner with IC design teams to define EMC specifications for new products... of your legal right to work in the United States under applicable law, verification of satisfactory references...

Company: Infineon
Location: San Jose, CA
Posted Date: 25 Feb 2026
Salary: $92000 per year

SMTS Process Engineer

management; 2.Fault isolation and physical failure analysis; 3.Integrated Circuit (IC) chips design software such as Cadence... Schematics, LVS (Layout Versus Schematic), layout, and verification tools; 4.Scripting in TCL, Perl, or Python; 5.Advanced...

Posted Date: 22 Feb 2026

Memory Chip Design Engineer

optimization, final verification up to and including tape out Running and Debugging Physical Verification flows including DRC, LVS..., or Synopsys IC Validator Capability to work closely with circuit designers to iterate on schematics and with process engineers...

Company: Western Digital
Location: San Jose, CA
Posted Date: 19 Feb 2026
Salary: $145800 - 194400 per year

Hardware Engineer

and debugging. Coordinate and participate in verification processes to ensure products meet Cisco standards. Support system... in circuit design. Prior experience with design tools such as Cadence Concept and Allegro. Experienced in IC component...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 18 Feb 2026
Salary: $135800 - 193400 per year

Memory Chip Design Engineer

optimization, final verification up to and including tape out Running and Debugging Physical Verification flows including DRC, LVS..., or Synopsys IC Validator Capability to work closely with circuit designers to iterate on schematics and with process engineers...

Company: Western Digital
Location: San Jose, CA
Posted Date: 18 Feb 2026