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Keywords: IP/SoC Verification Lead, Location: Bangalore, Karnataka

Page: 4

Senior Engineer- RTL

specifications Lead code reviews and ensure high-quality, synthesizable RTL Work closely with verification, architecture... with SoC / IP-level design Good understanding of synthesis and timing concepts Experience mentoring junior engineers Low...

Company: Quest Global
Posted Date: 09 Jan 2026

Principal Engineer-Analog Circuit Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As an Analog IC Design Principal... Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage...

Company: Marvell
Posted Date: 09 Jan 2026

Senior Principal Engineer, RTL ASIC Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact About Marvell Marvell... is a place to thrive, learn, and lead. Your Team, Your Impact The Custom and Compute Solutions Business Unit closely...

Company: Marvell
Posted Date: 09 Jan 2026

CPU DFT Manager

. We are looking for an DFT expert to lead the Design-for-Test (DFT) design and verification for X86 CPU cores within ACE India. This role... of experience in DFT domain at IP or SoC level. 5+ years of experience managing and leading teams Strong knowledge and experience...

Company: Intel
Posted Date: 08 Jan 2026

Principal Engineer, RTL ASIC Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Infrastructure Processor Business Unit.... The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich...

Company: Marvell
Posted Date: 07 Jan 2026

Infra NOC (RTL)Design Engineer-Staff/Sr Staff

for specification, design and implementation of interconnect and related IP's Actively work with SoC team, verification team, physical... of solid experience in IP/SoC design and micro-architecture Understanding of interconnect protocols like CHI/AHB/AXI/ACE/ACE...

Company: Qualcomm
Posted Date: 04 Jan 2026

Senior Manager Silicon Design Engineering

a team to develop RTL for SoC subsystems and understand architectural specifications. Responsibilities include IP... and subsystem design, integrating multiple IPs, performing quality checks and working collaboratively with the IP/SoC team. KEY...

Posted Date: 02 Jan 2026

Firmware Developer ( UEFI / BIOS )

for the purpose of embedded software development Developing SystemC/TLM2.0 based models of IP blocks, CPU, SoC, System... at IP & SoC level Develop regress able self checking test suites using C/ARM assembly. Develop System Level Flows...

Company: UST
Posted Date: 31 Dec 2025

Analog IC Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As an Analog IC Design Principal... Engineering is the center hub providing IP to be used by all the other spokes on that wheel, including Automotive, Storage...

Company: Marvell
Posted Date: 24 Dec 2025

Telemetry SW Developer

device drivers etc. · Verification of models at IP & SoC level · Experience in on-chip connectivity/interfacing SPI, I2C... of IP blocks, CPU, SoC, System · Defining transaction level models of non-memory mapped interfaces (I2C, SPI, USB, CAN...

Company: UST
Posted Date: 24 Dec 2025

Associate III - VLSI DFT CAD

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... and on-time On time quality delivery approved by the project lead/manager Measures of Outcomes: * Quality –verified using...

Company: UST
Posted Date: 16 Dec 2025

Senior Principal Engineer, Physical Design

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Built on decades of expertise... infrastructure intellectual property (IP) and a wide array of flexible business models. In this unique role, you’ll have the...

Company: Marvell
Posted Date: 13 Dec 2025

Staff Synthesis & STA Engineer

About the Role As a Staff Synthesis & STA Engineer, you will own lead & own Synthesis & STA for complex high performance ICs... with large digital & analog interfaces. You'll influence implementation, guide methodology improvements, and lead small...

Posted Date: 12 Dec 2025

Principal Cybersecurity Incident Response Analyst

with cross-functional teams to improve our overall security posture. What you’ll do: Lead and coordinate responses to the... experience SOC team/Incident response/Advanced threat analyst experience is require Proven track record of leading complex...

Posted Date: 27 Nov 2025

Analog Design Engineer - High Speed Memory/IO Circuit

signal IP top level architecture and component/circuit level specifications Work and collaborate with System/Platform & SOC... your career. Analog Design Engineer - High Speed Memory/IO Circuit THE ROLE: Be part of AMD’s analog/mixed signal IP design...

Posted Date: 26 Nov 2025

Director - Pre-silicon Emulation / Post Silicon Validation

Lead the pre-silicon emulation and work closely with SOC design teams to validate the new silicon features Silicon bring.... SOC Feature Enablement - Work with IP and SOC Design to define the enablement sequence and define specs SOC Electrical...

Posted Date: 26 Nov 2025

NoC (RTL) Design - PE/Director

and implementation of interconnect and related IP's Actively work with SoC team, verification team, physical design team, SoC Floorplan... on customer problem solving related to NoC/Interconnect Minimum Qualifications: 18+ years of solid experience in IP/SoC design...

Company: Qualcomm
Posted Date: 25 Nov 2025

Senior Principal Engineer

applications. What You Can Expect Lead the DV execution and sign-off for the entire IP, Subsystem and SoC Define and drive...’s degree in CS/EE with 20+ years of relevant experience Strong background in IP and SoC verification methodologies...

Company: Marvell
Posted Date: 22 Nov 2025

Principal Physical Design Engineer

implementation tasks over management responsibilities. Key Responsibilities Lead and perform all major steps of the digital... quality. Develop and implement strategies for power integrity, IR-drop analysis, EM verification and low-power physical...

Posted Date: 21 Nov 2025

Associate II - VLSI

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks...

Company: UST
Posted Date: 29 Oct 2025