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Keywords: Lab/PVT Validation Engineer, Location: Santa Clara, CA

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Lab/PVT Validation Engineer

in an electronics lab performing PVT or HAST/HTOL-type testing on FPGAs, SoCs, or high-speed digital boards. Proficiency with Python...-density boards. Excellent written and verbal communication skills. Experience: Running PVT characterization in lab...

Company: Cynet Systems
Location: Santa Clara, CA
Posted Date: 11 Dec 2025
Salary: $58 - 65.51 per hour

Senior Principal SERDES Engineer - Signal Integrity

. What You Can Expect Marvell is seeking a Senior Principal SERDES Signal Integrity Engineer to lead SERDES IP validation..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Marvell post silicon validation...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 11 Dec 2025
Salary: $164650 - 246700 per year

Post Silicon Hardware System Integration Engineer'

to the world. Join us and help define the future of computing. We seek an experienced Post-Silicon Hardware Engineer.... Creative Problem Solving – Design workarounds and solutions through lab experimentation, applying advanced debug tools to meet...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 07 Nov 2025

Senior Memory Post Silicon Qualification Engineer

-speed memory interface on complex chips like GPUs and SoCs. Functional validation, IO tuning, and PVT testing of the..., where required. Collaborate with the pre-Si team to understand the new features and create appropriate validation test plans. What we need...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 Oct 2025