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Keywords: Lead DFT Design Engineer, Location: Bangalore, Karnataka

Page: 4

CPU Firmware Verification and Validation / Sr Staff Engineer

& customer satisfaction. As a CPU FW V&V Engineer, you will take on a lead technical role, working closely with cross... with a focus on smooth integration and Design For Test (DFT) Minimum Qualifications: • Bachelor's degree in Engineering...

Company: Qualcomm
Posted Date: 18 Jan 2026

Staff Product Test Engineer

, ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and . Staff Product Test Engineer...: This technical lead role will lead the Product and Test Engineering (PTE) activities on new product development of ASIC and SOC...

Posted Date: 15 Jan 2026

Principal Engineer - Memory Compiler Tiler/CAD

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Principal Engineer - Tiler/CAD Work... Technical: Custom memory circuit design (sense amps, periphery), analog/digital CMOS, semiconductor physics, DFT, Verilog/VHDL...

Company: Marvell
Posted Date: 14 Jan 2026

Hardware Engineer (Hish Speed)

Title: Hardware Engineer (Hish Speed) Location: Bangalore Exp: 3-6yrs Job Description: Lead hardware design... and development for ADAS, Cockpit, and Connectivity ECUs, from concept to production. Design high-speed digital boards with advanced...

Company: NR Consulting
Posted Date: 11 Jan 2026

Hardware/SOC Validation Engineer

Familiarity with x86 Debug Tools ,DFT (Design for Testability) Good understanding of DFT /JTAG 1149.x / BMC (Baseboard management... your career. Hardware/SOC Validation Engineer THE ROLE: The right engineer will drive the success of power IP (Intellectual...

Posted Date: 10 Jan 2026

Staff Engineer

responsibilities in your new role To work as a timing Synthesis/Timing (STA) engineer and taking care of end to end responsibilities...) at block and SoC level designs. Define and evaluate constraints and signoff Test/DFT mode timing requirements. Knowledge...

Company: Infineon
Posted Date: 10 Jan 2026

Senior Product Test Engineer

of the Perl/C++ programming Be experienced in ATE high-speed digital h/w design & layout, with lead skills in understanding..., ADI ensures today's innovators stay Ahead of What's Possible™. Learn more at and on and . Senior Product Test Engineer...

Posted Date: 26 Dec 2025

Staff Synthesis & STA Engineer

About the Role As a Staff Synthesis & STA Engineer, you will own lead & own Synthesis & STA for complex high performance ICs... in Digital Synthesis, DFT insertion, Check Design and Check Timing Analysis Good understanding of all aspects of liberty models...

Posted Date: 12 Dec 2025

SOC Verification Engineer: Security DV

your career. SENIOR SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: Security DV ): Work on SOC level... and integration. Add on responsibility SOC Integration after having co-ordination with IPs, SOC (Design, DFT & PD) teams...

Posted Date: 10 Dec 2025

Staff Engineer, STA

Business Unit (DBU) is seeking a Staff STA Engineer to lead timing sign-off and closure for complex mixed-signal SoCs..., Tempus). Implement ECOs for timing fixes and validate changes. Collaborate with RTL, physical design, and DFT teams...

Posted Date: 06 Dec 2025

Senior ASIC Engineer, Switch SoC

We are currently seeking an expert SOC Design and Integration Engineer with strong design fundamentals to work.... Good teamwork spirit and collaboration skills with team members. Experience in synthesis, physical design and DFT...

Company: Nvidia
Posted Date: 04 Dec 2025

Principal Hardware Engineer

architecture and drive DFT requirements early in the design cycle. As a member of this team you will also be involved in crafting... groundbreaking next generation networking chips. You will help lead to drive the DFT and quality process through the entire...

Company: Cisco Systems
Posted Date: 06 Feb 2026

Technologist Engineer, ASIC Development Engineering

, including planning, execution, and closure. Leadership & Mentorship: Lead and mentor junior/mid-level engineers, review..., timing, low-power, DFT) using JTAG, trace, waveform capture, and performance counters. Power & GLS Validation: Run and debug...

Company: SanDisk
Posted Date: 31 Jan 2026

NPU/AI Processor Synthesis Sr Staff Engineer

-cycle paths, and false paths. Cross-Functional Collaboration Work closely with RTL design, DFT, and physical design... General Summary: Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure...

Company: Qualcomm
Posted Date: 29 Jan 2026

Component Engineer

with strategic objectives and delivering innovative solutions that optimize product design, reduce material costs, and enhance... (SI/PI), and Component Derating , where needed to de‑risk design changes. Cost Optimization & Circuit Redesign Execute...

Company: GE HealthCare
Posted Date: 25 Jan 2026

Principal Engineer - SOC Clocking

Job Details: Job Description: Key Responsibilities: Lead the architecture, design, and integration of SoC-wide... with RTL, physical design, verification, and DFT teams to deliver end-to-end SoC clocking and custom IP. Own the technical...

Company: Intel
Posted Date: 15 Jan 2026

Senior Engineer- RTL

Job Requirements Lead RTL design activities for complex digital blocks and guide the team from architecture to tape...-power design knowledge (UPF / CPF) Exposure to DFT and formal verification Work Experience Required Skills & Experience...

Company: Quest Global
Posted Date: 09 Jan 2026

NPU / AI Processor Synthesis Engineer

-cycle paths, and false paths. Cross-Functional Collaboration Work closely with RTL design, DFT, and physical design... General Summary: Job Description Role Overview The NPU Synthesis Lead will be responsible for driving synthesis...

Company: Qualcomm
Posted Date: 06 Dec 2025

Senior Manager SOC and ASIC execution

your career. SENIOR MANAGER SILICON DESIGN ENGINEER THE ROLE (SOC Lead): Drive and lead end-to-end SOC/ASIC execution working... with functional teams like Design, DFT, Verification, Physical Design to drive execution from concept to tape-out. Driving Silicon...

Posted Date: 21 Jan 2026

Associate III - VLSI STA

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... architecturec. Strong knowledge in Physical Design / Circuit Design / Analog Layout d. Strong understanding of Synthesis DFT...

Company: UST
Posted Date: 17 Dec 2025