Lead Software Engineer (Verification of VIP using Verilog/SV/UVM – Ahmedabad)

. Job Description: Job Title: ( Verification of VIP using Verilog/SV/UVM – Ahmedabad ) Cadence is a pivotal leader in electronic design, building....com Responsible for verification of VIP using Verilog/SystemVerilog/UVM Involve in managing multiple VIPs, leading a small team...