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Keywords: Package Design Engineer, Location: Santa Clara, CA

Page: 3

ASIC Design Engineer - Cache Controller

, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency... of the SOC memory hierarchy. Responsibilities Design and develop hardware for cache subsystem in high performance system...

Company: Apple
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

AI/ML Design Verification Methodology Lead Engineer

: As a AI/ML Design Verification Methodology Lead, will involve in developing and implementing verification strategies... closely with design, architecture, and software teams. Job Responsibilities This role involve defining and driving AI/ML...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

ASIC Design Engineer - Cache Controller

, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency... of the SOC memory hierarchy. Responsibilities Design and develop hardware for cache subsystem in high performance system...

Company: Apple
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

ASIC Design Engineer - Cache Controller

, we are presented with design challenges exacerbated by clients with varying but simultaneous needs such as real-time, low latency... of the SOC memory hierarchy. Responsibilities Design and develop hardware for cache subsystem in high performance system...

Company: Apple
Location: Santa Clara, CA
Posted Date: 10 Oct 2025
Salary: $126800 - 190900 per year

Analog Design Engineer, Principal

design team providing high performance analog and mixed mode circuits for industry-leading Networking and Automotive Ethernet... products. Candidate will have opportunity to architect and design circuits for high performance transceivers and other critical...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 09 Oct 2025
Salary: $165630 - 248100 per year

Principal Design Verification Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As part of the Design Verification... that each design meets our customers’ specifications whether they’re a major telecom organization or automotive company...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Oct 2025
Salary: $146850 - 220000 per year

Senior Principal Design Verification Engineer

, advanced die-to-die and packaging technology, and optimized low-power techniques. As part of the Marvell Data Center Design... that each design meets our customers’ specifications whether they’re a major hyperscaler company or telecom organization...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Oct 2025

Principal Engineer, Design Verification

-growing product lines that encompass high performance design, advanced die-to-die and packaging technology, and optimized low.... Additional Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 01 Oct 2025
Salary: $146850 - 220000 per year

Senior Staff Design Verification Engineer

-growing product lines that encompass high performance design, advanced die-to-die and packaging technology, and optimized low... Compensation and Benefit Elements At Marvell, we offer a total compensation package with a base, bonus and equity.Health...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 27 Sep 2025
Salary: $124420 - 186400 per year

Principal Design Verification Engineer

-growing product lines that encompass high performance design, advanced die-to-die and packaging technology, and optimized low...-power techniques. As part of the Design Verification Team at Marvell, you will verify all of the circuitry that goes...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 27 Sep 2025
Salary: $146850 - 220000 per year

Physical Design Engineer Intern - Master's Degree

the most difficult design problems in the areas of AI, data movement, memory/storage, switch, networking, security..., and other infrastructure applications. The Marvell Physical Design team is located in our Santa Clara, CA office, and has a long history...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 25 Sep 2025
Salary: $27 - 55 per hour

Senior Layout Mask Design Engineer

, to amplify human creativity and intelligence. We are looking for you! You'll work on the design and development... of our next generation custom SRAM design. As part of the Digital IP Team, you will work with other team members on the new process design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Sep 2025
Salary: $124000 - 195500 per year

Analog IC Design, Principal Engineer

budget, behavioral modeling, and transistor-level feasibility. You will also drive schematic design and collaborate on mask... design for implementation. And finally, with the team, you will drive designs into volume production and delight customers...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 17 Sep 2025
Salary: $165630 - 248100 per year

Mechanical Engineer IV _ Gas Box Design

new chip and advanced display in the world. We design, build and service cutting-edge equipment that helps our customers... and care for you at work, at home, or wherever you may go. Learn more about our . Key Responsibilities Design, develop...

Location: Santa Clara, CA
Posted Date: 14 Sep 2025

Hardware Design Engineer Intern - Bachelor's Degree

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact The Hardware Design team in the... System Design Engineering Department of the Connectivity Business Unit develops evaluation boards and reference designs...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 11 Sep 2025
Salary: $27 - 53 per hour

Analog IC Design, Senior Principal Engineer

-level feasibility. You will also drive schematic design and collaborate on mask design for implementation. And finally...-signal design with experience in high-speed transceivers. Solid understanding and experience of designing analog mixed...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 20 Aug 2025

Analog IC Design Engineer, Senior Staff

-level feasibility. You will also drive schematic design and collaborate on mask design for implementation. And finally... understanding of analog mixed-signal design with experience in high-speed transceivers. Solid understanding and experience...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 20 Aug 2025
Salary: $140350 - 210200 per year

SRAM Circuit Design Engineer

Do you have a passion for crafting entirely new solutions? Be a part of a world-class silicon design team... from scratch if needed, bringing forward-thinking ideas to the real world. Join us, and you'll help design the foundation...

Company: Apple
Location: Santa Clara, CA
Posted Date: 16 Aug 2025

Senior Principal Analog Mixed-Signal IC Design Engineer

and performing design verification using industry standard tools such as SPICE, Spectre, MATLAB etc. Should be comfortable carrying... out layout activities in nanometric technologies and be able to supervise physical design. Should be able to work in the...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 16 Aug 2025

PCB Design Layout Engineer

with product design engineers, you'll perform PCB layout of high speed/high-density value conscious PCBs for all business units... at NVIDIA (GPU Desktop, Notebook, Automotive, Professional, Data Center, Deep Learning and AI), all using Cadence PCB design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 14 Aug 2025