your career. THE ROLE: As a Physical Design Engineer - Flow & Methodology, you will drive the development, enhancement..., and deployment of advanced physical design flows and methodologies across multiple design teams. You will collaborate with cross...
methodologies into the SOC project Maintain and enhance the power optimization methodologies in the physical design flow Closely... collaborate with the SOC project design team, help/support/drive them to adopt the physical design power optimization methodology...
methodologies into the SOC project Maintain and enhance the power optimization methodologies in the physical design flow Closely... collaborate with the SOC project design team, help/support/drive them to adopt the physical design power optimization methodology...
‑end designers, physical design teams, CAD, and methodology leads to build scalable, automated, and robust solutions... predictability, and silicon quality across multiple programs. THE PERSON: You have a strong passion for physical design, EDA flow...
your career. THE ROLE: As a Silicon Design Engineer 2, you will develop, enhance, and maintain industry-leading physical..., physical design teams, CAD, and methodology leads to build scalable, automated, and robust solutions spanning all three...
your career. Responsibilities: THE ROLE: AMD is looking for an experienced Design Verification Engineer willing to take on the... challenge of verifying a leading edge PCIe Controller Design. In this role you will be given an opportunity to work on the...
your career. THE ROLE: AMD is looking for an experienced Design Verification Engineer willing to take on the challenge... of verifying a leading edge PCIe Controller Design. In this role you will be given an opportunity to work on the next generation...
, physical design, and DFT teams to ensure timing closure across multiple modes and corners, while maintaining design quality... violations and optimize timing closure. Methodology & Flow Development: Research and implement new timing and constraint...
collaborating with RTL, physical design, and DFT teams to ensure timing closure across multiple modes and corners, while maintaining... violations and optimize timing closure. Methodology & Flow Development: Research and implement new timing and constraint...
your career. Responsibilities: THE ROLE: The Data Accelerator (DACC) team at AMD is seeking an Silicon Design Verification... Engineer who will be involved in multiple aspects of IP verification. This role is an excellent opportunity to work...
your career. THE ROLE: The Data Accelerator (DACC) team at AMD is seeking an Silicon Design Verification Engineer who... rapidly expanding domain of custom hardware accelerators. The Design Verification (DV) group within this team is responsible...
, architecture and physical design teams to achieve first pass silicon success Participate in the testbench architecture... to be mentored by the industries best engineers to further their careers! KEY RESPONSIBILITIES: Collaborate with design...
, architecture and physical design teams to achieve first pass silicon success Participate in the testbench architecture... to be mentored by the industries best engineers to further their careers! KEY RESPONSIBILITIES: Collaborate with design...
your career. Responsibilities: THE ROLE: The Memory PHY team is looking for a highly skilled Senior / Lead Design Engineer...: You are an experienced digital design engineer with deep knowledge of DDR PHY/controller architecture and JEDEC specifications...
your career. THE ROLE: The Memory PHY team is looking for a highly skilled Senior / Lead Design Engineer for RTL development..., and architecture teams develop leading edge and differentiating IPs. THE PERSON: You are an experienced digital design engineer...
implementation RTL design quality and reliability methodology and flow development Direction and supervision of other RTL..., verification to physical implementation PHY link layer design, implementation & verification with Analog and System architect...
implementation RTL design quality and reliability methodology and flow development Direction and supervision of other RTL..., verification to physical implementation PHY link layer design, implementation & verification with Analog and System architect...
and next-gen compute. The hybrid scope covers full-custom layout and I/O ring assembly/physical verification, with the emphasis... exposure from transistor-level design to top-level signoff and tapeout. You’ll collaborate closely with custom circuit...
hybrid scope covers full-custom layout and I/O ring assembly/physical verification, with the emphasis shifting... from transistor-level design to top-level signoff and tapeout. You’ll collaborate closely with custom circuit designers, I/O and ESD...