Job Description We are seeking a highly skilled Principal Engineer - DFT Lead to drive Design-for-Test (DFT) strategy... and implementation for multi-chiplet Power efficient MCU chipsx. This role requires deep technical expertise in DFT methodologies...
Job Description We are seeking a highly experienced Chip design lead to join our SoC development team. This role... involves driving the chip RTL design for power efficient chips and collaborating across architecture, verification...
Job Description We are seeking a Principal Engineer - Implementation Lead to own synthesis and timing closure sign... while adhering to mature-node constraints Lead static timing analysis (STA) and timing closure activities across multiple corners...