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Keywords: Principal Verification Design Engineer, Location: Santa Clara, CA

Page: 1

Principal Verification Design Engineer

all aspects of the front-end design flow (incl. timing closure and power optimization) As a Sr. Staff Engineer, you will lead..., but not be limited to: Responsible for micro-architecture design and development of DSP logic. Working with Architects and Verification...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025
Salary: $124420 - 186400 per year

Principal ASIC Design Verification Engineer (NetSec)

. Job Description Your Career As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking... in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation...

Location: Santa Clara, CA
Posted Date: 11 Dec 2025

Principal ASIC Design Verification Engineer (NetSec)

. Job Description Your Career As a Design Verification engineer on the ASIC team, you will ensure that the ASICs in our groundbreaking... in software, architecture, design, and verification teams to create comprehensive pre-silicon verification plans across simulation...

Location: Santa Clara, CA
Posted Date: 11 Dec 2025

Senior Principal Design Verification Engineer

, advanced die-to-die and packaging technology, and optimized low-power techniques. As part of the Marvell Data Center Design... Verification Team, you will verify all of the circuitry that goes inside our chips for the general market and for specific...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Oct 2025

Principal Design Verification Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As part of the Design Verification... with scripting language such as Python or Perl and EDA Verification tools. Experience with Object-Oriented Design and implementation...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 05 Oct 2025
Salary: $146850 - 220000 per year

Principal Engineer, Design Verification

-growing product lines that encompass high performance design, advanced die-to-die and packaging technology, and optimized low...-power techniques. What You Can Expect In this role, you will architect and develop a functional verification environment...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 01 Oct 2025
Salary: $146850 - 220000 per year

Principal Design Verification Engineer

-power techniques. As part of the Design Verification Team at Marvell, you will verify all of the circuitry that goes...-growing product lines that encompass high performance design, advanced die-to-die and packaging technology, and optimized low...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 26 Sep 2025
Salary: $146850 - 220000 per year

AI/ML Design Verification Methodology Lead Engineer

: As a AI/ML Design Verification Methodology Lead, will involve in developing and implementing verification strategies..., and coverage-based verification methodology Experience with C/C++, assembly language. Knowledge of low power design concepts...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 09 Oct 2025

Principal Mixed Signal Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As an Analog IC Design Principal... electronic design automation (EDA) tools for schematic capture, simulation, layout, and verification, such as Cadence, Synopsys...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 06 Dec 2025
Salary: $165630 - 248100 per year

Digital IC Principal Design Engineer

functionality. Collaborate with verification engineer to develop exhaustive test cases to ensure successful design. Work closely..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Principal...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 03 Dec 2025
Salary: $146850 - 220000 per year

Senior Principal Digital IC Design Engineer

Design Engineer at Marvell, you will be part of the DCE – Connectivity Business Group, contributing to the development...-functional teams and contribute to the continuous improvement of design and verification methodologies. Supervise and mentor...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 12 Nov 2025

Digital, Mixed Signal IC Design Engineer, Principal

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Digital IC Design Principal... other chip companies and big tech companies, familiar names to all candidates. What You Can Expect ASIC design engineer...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Nov 2025
Salary: $146850 - 220000 per year

Principal Engineer, Physical Design

methodologies that enable scalable, high-performance implementation. As a Principal Engineer, you will operate at the intersection... of technical depth and strategic influence, driving innovation across teams and projects. As a Principal Engineer in the Physical...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 29 Oct 2025
Salary: $146850 - 220000 per year

Principal Physical Design Engineer

and targeted at the forefront of data infrastructure. What You Can Expect As a Principal Physical Design Engineer specializing.... This Principal Physical Design Engineer role offers an impactful platform to shape Marvell’s next generation of products and lead...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 04 Oct 2025
Salary: $146850 - 220000 per year

Digital Design Engineer, Principal

center and enterprise companies to bring next generation networking to reality. What You Can Expect As a Principal Design.... We develop the architecture, collaborate on IP development, create the physical design, and work with the world’s leading AI data...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 19 Sep 2025
Salary: $146850 - 220000 per year

Analog IC Design Engineer, Principal Engineer

a team of analog design engineers, interface with layout, verification, and application teams and manage delivery of analog..., DDR5/LPDDR5; GDDR6/LPDDR6 a plus Experience with analog design and verification tools (Virtuoso, Spectre, ADE and post...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 21 Oct 2025
Salary: $165630 - 248100 per year

Senior Principal Engineer, Physical Design

experience in back-end physical design and verification, including significant leadership roles Proven track record of leading... opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025

Senior Principal Digital IC Design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Our design team works on state...-of-the-art datacenter and AI SOCs. As a member of the R&D team, you will design world-class hardware for the industry...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 30 Oct 2025

Principal Silicon Design Engineer

experience in reusable verification methodology such as UVM Have hands-on experience in SOC Design/Integration activities... and IP level design, SOC architecture and implementation strategies. THE PERSON: Excellent communication and presentation...

Posted Date: 20 Sep 2025

DevOps and Continuous Integration Engineer, Lead, Senior Staff or Principal

Verification Engineer responsible for designing, implementing, and managing automated CI/CD pipelines and infrastructure. Manage... experiences and drives digital transformation to help create a smarter, connected future for all. As a Qualcomm Software Engineer...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 13 Dec 2025