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Keywords: RTL, Location: California

Page: 8

Silicon Microarchitecture Engineer

and RTL design. Selection and integration of in-house and third party IP. Exploration of various trade-offs of future... Engineering, Computer Science, or equivalent practical experience. 7+ years of experience in RTL design in Verilog/System Verilog...

Company: DeepMind
Location: Mountain View, CA
Posted Date: 09 Jan 2026

Senior Quantum Engineer

specific IC design, physical design, physical verification, register transfer level (RTL) to graphic data system (GDS) flow...

Company: Microsoft
Location: Santa Barbara, CA
Posted Date: 09 Jan 2026

EDA Methodology Architect

, with expertise in key stages such as RTL, DFT, synthesis, placement, optimization, CTS, routing, and signoff. Creativity and self..., RTL, DFT, synthesis, physical design, power, signoff, and CAD/methodology teams as a key technical leader and bridge...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 09 Jan 2026

DSP and Wireless Systems Engineer, Digital RF Systems

to match RTL implementations, emulations, FW development - Familiarity with phased array systems and phased array performance...

Company: Amazon
Location: San Diego, CA
Posted Date: 08 Jan 2026

GPU Design Verification Engineer

solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation..., FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include...

Company: Prodapt
Location: San Jose, CA
Posted Date: 07 Jan 2026

GPU Design Verification Engineer

services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design..., UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up...

Company: Prodapt
Location: San Jose, CA
Posted Date: 07 Jan 2026

FPGA HW/SW Codesign Engineer

new features to be developed RTL Development: Design, verify, and validate high-performance logic using System Verilog...-on experience with FPGAs RTL Expertise: Expert in SystemVerilog/Verilog, synchronous design, and timing closure for high-speed...

Posted Date: 07 Jan 2026

Senior FPGA Design Engineer

FPGA architectures using Xilinx devices (UltraScale, UltraScale+, Versal, etc.) Create RTL designs using Verilog...

Posted Date: 07 Jan 2026

Director, SOC Design

SOC designs Lead the SOC design team by being hands-on with RTL coding, IP integration flows and drive quality... and security requirements Hands on experience with RTL Coding and methodologies, IP integration flows, design quality tools...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Jan 2026

Numerical Architecture Engineer

& architecture design, modelling, RTL creation, high/higher level synthesis and formal verification across the design abstractions...

Posted Date: 07 Jan 2026

Principal Silicon DV Engineer

debugging Register Transfer Level (RTL) designs as well as simulation and/or emulation environments. 12+ years of experience...

Company: Microsoft
Location: Mountain View, CA
Posted Date: 07 Jan 2026

Camera Design Engineer

Image Signal Processing algorithms Own and deliver core level IP and Camera Subsystem RTL design Run synthesis, review... to have 5+ years of industry exp. in: Verilog or VHDL RTL design Design Verification Bus protocols like AHB, AXI Image...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 07 Jan 2026

Senior Verification Engineer – AI SoC Development

work with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams...

Company: Intel
Location: Folsom, CA
Posted Date: 04 Jan 2026

ASIC Physical Design Lead (remote)

designs from RTL handoff through tapeout. The ideal candidate has 10+ years of hands-on experience in advanced node physical.... In this role, you will partner closely with Architecture, RTL Design, Verification, DFT, and Power teams to deliver high...

Location: San Diego, CA
Posted Date: 04 Jan 2026

ASIC Physical Design Lead (remote)

designs from RTL handoff through tapeout. The ideal candidate has 10+ years of hands-on experience in advanced node physical.... In this role, you will partner closely with Architecture, RTL Design, Verification, DFT, and Power teams to deliver high...

Location: San Jose, CA
Posted Date: 04 Jan 2026

Senior Design Engineer – AI SoC Development

level (RTL) coding, and simulation for SoC designs while integrating IP blocks and subsystems into full chip SoC or discrete... and perform quality checks across various logic design aspects ranging from RTL to timing/power convergence...

Company: Intel
Location: Folsom, CA
Posted Date: 04 Jan 2026

Senior Design Engineer – AI SoC Development

level (RTL) coding, and simulation for SoC designs while integrating IP blocks and subsystems into full chip SoC or discrete... and perform quality checks across various logic design aspects ranging from RTL to timing/power convergence...

Company: Intel
Location: Folsom, CA
Posted Date: 04 Jan 2026

ASIC Physical Design Lead (remote)

designs from RTL handoff through tapeout. The ideal candidate has 10+ years of hands-on experience in advanced node physical.... In this role, you will partner closely with Architecture, RTL Design, Verification, DFT, and Power teams to deliver high...

Location: Irvine, CA
Posted Date: 04 Jan 2026

Verification Engineer – AI SoC Development

work with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams...

Company: Intel
Location: Folsom, CA
Posted Date: 04 Jan 2026

ASIC Physical Design Lead (remote)

designs from RTL handoff through tapeout. The ideal candidate has 10+ years of hands-on experience in advanced node physical.... In this role, you will partner closely with Architecture, RTL Design, Verification, DFT, and Power teams to deliver high...

Posted Date: 04 Jan 2026