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Keywords: RTL Design Lead - IP Design, Location: Bangalore, Karnataka

Page: 4

Lead DFT Engineer

cutting-edge designs. As a member of the front-end design/integration team, you will work closely with the architecture, IP..., Perl/Shell scripting, and Verilog RTL design ACADEMIC CREDENTIALS: Bachelors or Masters degree in computer engineering...

Posted Date: 11 Sep 2025

Emulation Lead Engineer, Senior

General Summary: Job Summary: 6-10 years of experience in Emulation of complex Qualcomm propriety DSP IP DSP design team... of Digital Design, RTL design, improving model performance and Processor Architecture Strong troubleshooting, analytical...

Company: Qualcomm
Posted Date: 04 Sep 2025

Soc DFT Scan/ATPG Lead

with the DFT Architecture and the various IP Design teams to align on the DFT requirements and successfully implementing the... development using Verilog/System Verilog having worked on RTL for IP and SoC integration Proficient in doing basic unit-level...

Posted Date: 15 Aug 2025

Technical Lead I - VLSI

Backend or Analog design with minimal supervision Outcomes: * Work as an individual contributor owning any one task of RTL... Calibre etc. (experience in one or more tools) Technical Knowledge:a. IP Spec Architecture Design Micro Architecture...

Company: UST
Posted Date: 14 Aug 2025

Technical Lead I - VLSI

Backend or Analog design with minimal supervision Outcomes: * Work as an individual contributor owning any one task of RTL... Calibre etc. (experience in one or more tools) Technical Knowledge:a. IP Spec Architecture Design Micro Architecture...

Company: UST
Posted Date: 03 Aug 2025

Technical Lead II - VLSI

contributor take ownership for any one or more task/module of RTL Design/Module Verification/PD/DFT/Circuit Design/Analog Layout... PT/Tempus Calibre etc. (experience with one or more tools) Technical Knowledge:a. Implement IP Spec Architecture Design...

Company: UST
Posted Date: 03 Aug 2025

Technical Lead II - VLSI

contributor take ownership for any one or more task/module of RTL Design/Module Verification/PD/DFT/Circuit Design/Analog Layout... PT/Tempus Calibre etc. (experience with one or more tools) Technical Knowledge:a. Implement IP Spec Architecture Design...

Company: UST
Posted Date: 02 Aug 2025

Senior Technologist, ASIC Development Engineering

. SanDisk, a leader in data storage solutions, is seeking talented and experienced ASIC RTL Design Engineers to join our cutting...: Partner with SoC Design, Verification, Validation, DFT, Physical Design, Mixed-Signal IP, Foundry, Hardware, Firmware...

Company: SanDisk
Posted Date: 07 Oct 2025

Associate III - VLSI SVP -CD

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 13 Sep 2025

Senior Staff Engineer-PD

role in developing and implementing timing and logic ECOs, collaborating closely with the RTL design team to drive..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Built on decades of expertise...

Company: Marvell
Posted Date: 31 Aug 2025

Senior DFT Engineer

verilog/system verilog RTL related to DFT logic design. ATE Test Readiness: Lead DFT-to-ATE handoff, including:  Drive.... Make history. We are seeking a seasoned and strategic Sr DFT Engineer to Lead end-to-end Design-for-Test (DFT) planning...

Company: Amazon
Posted Date: 30 Aug 2025

Associate III - VLSI SRAM ACD

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 15 Aug 2025

Associate III - VLSI Analog Layout

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 15 Aug 2025

Associate II - VLSI SC Char

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks...

Company: UST
Posted Date: 15 Aug 2025

Associate III - VLSI ML

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 08 Aug 2025

Associate III - VLSI IO

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 08 Aug 2025

Associate III - VLSI

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 03 Aug 2025

Associate III - VLSI

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 03 Aug 2025

Associate III - VLSI

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... PT/Tempus Calibre etc. (any one) Technical Knowledge: (any one)a. Partially implement IP Spec Architecture Design Micro...

Company: UST
Posted Date: 03 Aug 2025

Associate II - VLSI

of VLSI Frontend Backend or Analog design under minimal supervison from the Lead Outcomes: * As an Individual contributor... work on any one task of RTL Design/Module in Verification/PD/DFT/Circuit Design/Analog Layout/STA/Synthesis/Design Checks...

Company: UST
Posted Date: 03 Aug 2025