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Keywords: Soc DFT Scan/ATPG Lead, Location: Bangalore, Karnataka

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Soc DFT Scan/ATPG Lead

analysis, and silicon debug of DFT Scan/ATPG test in leading edge process technologies. AMD's environment is fast paced..._ SMTS SILICON DESIGN ENGINEER THE ROLE: As a member of the S3 SoC DFT Team, the successful candidate will own the DFT...

Posted Date: 15 Aug 2025

Urgently Hiring 10 + Years of DFT Lead Engineers_Exposure on SCAN insertion, ATPG and pattern simulation/debug._Bangalore Location_CTC 80 LPA+

DFT, RTL implementation, Verification, Scan and ATPG.  SCAN insertion, ATPG and pattern simulation/debug.  MBIST... has extensive experience in planning, implementation and verification of DFT features for multiple SoC. Direct Responsibilities...

Company: Angel & Genie
Posted Date: 27 Sep 2025

DFT Lead- Bangalore- 10+ years’ experience

on various aspects of IP and SoC DFT including the DFT Architecture, Spyglass DFT, RTL implementation, Verification, Scan... and ATPG. SCAN insertion, ATPG and pattern simulation/debug. MBIST and Repair implementation and verification TOP DFT...

Company: Angel & Genie
Posted Date: 01 Oct 2025

Lead DFT Engineer

. Strong expertise in industry-standard and proprietary DFT techniques, including: SCAN/ATPG Built-in-Self-Test (MBIST/LBIST...Job Title: Lead DFT Engineer Location: Bengaluru Experience: 12+ Years Notice Period: 30days Role Overview...

Posted Date: 30 Sep 2025

DFT Lead

Job Requirements Hands on Technical lead with SoC & Netlist level DFT execution experience and one can guide juniors... Work Experience Well versed with MBIST, OCC, EDT Insertion, Scan Insertion, ATPG, GLS, SDC, FSDB4IR_Drop, Pattern...

Company: Quest Global
Posted Date: 09 Aug 2025

Associate II - VLSI DFT

for multiple projects - Strong understanding of DFT methodologies and experience in standard DFT tools. - Familiarity with SoC... style DFT architectures including multi-clock domain and low power design practices. - Knowledge of DFT including Scan...

Company: UST
Posted Date: 14 Oct 2025

DFT Director

in the following: Expert in industry standard DFT (TAP/JTAG, MBIST, SCAN/ATPG) Experienced in DFT product architecture... and Hyperscaler Domains. The DFT Director's responsibilities include (but are not limited to): 1. Lead the product DFT Architecture...

Company: Intel
Posted Date: 23 Sep 2025

Senior DFT Engineer

. Make history. We are seeking a seasoned and strategic Sr DFT Engineer to Lead end-to-end Design-for-Test (DFT) planning.... Key job responsibilities Key job responsibilities  Lead development & implementation of DFT architecture including...

Company: Amazon
Posted Date: 30 Aug 2025

Staff DFT Engineer

autonomous devices like vehicles and robots to make more intelligent and safe decisions. Role Overview As a DFT Lead.... Work closely with IP vendors on proper DFT Implementation of the IPs in SoC. Supporting post-silicon bring-up and debug...

Company: Aeva
Posted Date: 01 Aug 2025

Associate II - VLSI DFTN

for multiple projects - Strong understanding of DFT methodologies and experience in standard DFT tools. - Familiarity with SoC... style DFT architectures including multi-clock domain and low power design practices. - Knowledge of DFT including Scan...

Company: UST
Posted Date: 14 Oct 2025

PMTS Silicon Design Engineer

designs. Oversee implementation and verification of DFT RTL build, scan insertion, ATPG, BIST (MBIST, LBIST), boundary scan... global DFX engineering teams across AMD. THE ROLE We are seeking a highly skilled and experienced DFT Engineering Lead...

Posted Date: 01 Oct 2025