your career. Responsibilities: THE ROLE: The Data Accelerator (DACC) team at AMD is seeking a Silicon Design Engineer to lead... and mentor other design engineers to achieve project goals and organizational growth. Work with verification, implementation...
physical implementation and signoff. Lead and participate in design specification reviews, microarchitecture reviews, and RTL... your career. Responsibilities: THE ROLE: The Memory PHY team is looking for a highly skilled Senior / Lead Design Engineer...
your career. THE ROLE: The Memory PHY team is looking for a highly skilled Senior / Lead Design Engineer for RTL development... and signoff. Lead and participate in design specification reviews, microarchitecture reviews, and RTL code reviews; enforce high...
your career. THE ROLE: The Data Accelerator (DACC) team at AMD is seeking a Silicon Design Engineer to lead a talented front... requirements. Collaborate with architecture teams to understand the requirements. Lead and mentor other design engineers...
-edge designs. This Video Hardware Design Verification Lead engineer leads the verification effort of a video codec (decode... verification plans, test results, and coverage reports. PREFERRED EXPERIENCE: Experience with digital design (verilog RTL...
. This Video Hardware Design Verification Lead engineer leads the verification effort of a video codec (decode & encode) hardware... verification plans, test results, and coverage reports. PREFERRED EXPERIENCE: Experience with digital design (verilog RTL...
, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience. OR Master...'s degree in Science, Engineering, or related field and 3+ years of ASIC design, verification, validation, integration...
and have the ability to lead by example Work closely with design to define verification methodology, Provide test plans.... Requirements: 3+ years ASIC design, verification, implementation or related work experience Proficiency with Verilog/VHDL RTL...
for DRC, LVS, timing, power integrity, and reliability. Collaborate with RTL, architecture, and verification teams..., EM) and low-power design techniques. Familiarity with formal verification , understanding of DFM and post-silicon validation...
: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who... development lifecycle. Lead and drive the bring-up and development of power management features from initial design...
for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent... development lifecycle. Lead and drive the bring-up and development of power management features from initial design...
is a place to thrive, learn, and lead. Your Team, Your Impact Our design team works on state-of-the-art datacenter... specifications and micro-architecture of the design Implement designs using low-power RTL coding techniques Collaborate with the...
and architecture at micro-architecture, L2/L3 cache design hierarchy, and core complex CCX-level. Understands physical design and RTL... your career. Responsibilities: THE ROLE: As the Power and Performance Attainment and Feature Enablement Lead...
and architecture at micro-architecture, L2/L3 cache design hierarchy, and core complex CCX-level. Understands physical design and RTL... your career. THE ROLE: As the Power and Performance Attainment and Feature Enablement Lead you will be expected to be a Cross...
, hardware design, software teams, and verification. This role is critical to accelerating AMD’s GPU roadmap for HPC and ML... technical point of contact between GPU Platform Emulation Engineers, HW Design, FW/SW Development, and Verification teams...
of contact between GPU Platform Emulation Engineers, HW Design, FW/SW Development, and Verification teams. Lead the deep... design, software teams, and verification. This role is critical to accelerating AMD’s GPU roadmap for HPC and ML markets...
THE ROLE: The Memory IO team is looking for a passionate and experienced Design Engineering Lead for RTL and Firmware... IPs. RESPONSIBILITIES: RTL design for memory I/O PHY Digital Architecture development from pathfinding, coding...
THE ROLE: The Memory IO team is looking for a passionate and experienced Design Engineering Lead for RTL and Firmware... IPs. RESPONSIBILITIES: RTL design for memory I/O PHY Digital Architecture development from pathfinding, coding...