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Keywords: RTL Engineer, Location: Santa Clara, CA

Page: 4

CPU DFT Verification Engineer

. Description As a CPU DFT Verification Engineer, you will have the following responsibilities: • Work closely with architecture, RTL...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Processor Power Management Verification Engineer

. Description As a CPU Processor Power Management Verification Engineer, you will have the responsibilities as follows: • Work closely... with architecture and RTL designers on verifying the functionality correctness of the Power Management and Clock Control logic • Develop...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

CPU Processor Power Management Verification Engineer

. Description As a CPU Processor Power Management Verification Engineer, you will have the responsibilities as follows: • Work closely... with architecture and RTL designers on verifying the functionality correctness of the Power Management and Clock Control logic • Develop...

Company: Apple
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

Senior ASIC Design Engineer - DFX

We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades... Engineering or related field. 5+ years of hands-on experience in SoC architecture, RTL design, and verification...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 26 Oct 2025

ASIC Design Engineer

NVIDIA is looking for an ASIC Design Engineer to join our Memory Subsystem Team! As an ASIC Design engineer at NVIDIA... and design including RTL design, synthesis and timing analysis using innovative CAD tools and using the latest process...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 26 Oct 2025
Salary: $108000 - 184000 per year

Senior DFX Methodology Engineer

We are now looking for a Senior DFT Engineer! NVIDIA has continuously reinvented itself over two decades... to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure we are making the right trade...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Oct 2025

R&D Hardware Engineer Intern

. As an R&D Hardware Engineer Intern in the Interferometer Electrical and Computer Engineering R&D group, you will be involved... in a team environment. Ability to quickly learn new technologies Experience with high performance RTL and associated...

Posted Date: 25 Oct 2025

R&D Hardware Engineer Intern

from design to production. As an R&D Hardware Engineer Intern in the Interferometer Electrical and Computer Engineering R&D group... effectively in a team environment. Ability to quickly learn new technologies Experience with high performance RTL and associated...

Posted Date: 23 Oct 2025

CPU Silicon Validation Engineer

bring-up efforts. Description Work closely with CPU RTL and DV teams to understand changes to our CPU designs... and to engineer test content for new CPU features • Create CPU validation test plans, ensuring all key features are covered • Develop...

Company: Apple
Location: Santa Clara, CA
Posted Date: 23 Oct 2025
Salary: $126800 - 190900 per year

Senior DFT Methodology Engineer

with 2+ years of experience in DFT, system architecture, or RTL design. Understanding of fundamental DFT topics.... Good understanding of RTL coding principles. Knowledge of high-speed interface architectures such as PCIe, USB3, DDR...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Oct 2025

Senior DFT Engineer

DFT Engineer to help shape the future of compute. As stewards of the entire Scan Test Lifecycle, we drive innovation... breakthrough Test Architectures for reticle sized, multi-chiplet products—from RTL to verification to post-silicon ATE bring-up...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Oct 2025

Senior DFX Methodology Engineer

We are now looking for a DFT Methodology Engineer! NVIDIA has continuously reinvented itself over two decades... vendor tools Good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 19 Oct 2025

Senior Formal Verification Engineer

NVIDIA is looking for Formal Verification Engineer to help verify the design and implementation of industry’s leading... CPUs and other High Performance Computing Solutions. As a Formal Verification Engineer, you will play a key role...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 16 Oct 2025

Senior Circuit Design Engineer

We are now looking for a Senior Circuit Design Engineer! NVIDIA stands at the intersection of hardware excellence... the design and physical implementation of custom digital IPs from RTL to layout using industry standard tools and custom...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Oct 2025

Principal Digital IC Design Engineer

Engineer within Custom Silicon Engineering (CCS), you will be part of a high-performance RTL team responsible for architecting... and implementing advanced SoC designs. CCS serves as the core execution engine for customer-driven silicon programs, delivering RTL, DV...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 09 Oct 2025
Salary: $146850 - 220000 per year

Senior ASIC Physical Design Engineer, Netlisting

, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer.... Expertise in logic equivalence checking/FV required from RTL to tapeout with industry-standard tools. Deep understanding...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 08 Oct 2025

Digital IC Design Staff Engineer

Engineer with Marvell, you’ll be a member of the Central Engineering business group. If you picture Marvell as a wheel, Central... design and application-specific integrated circuit (ASIC) design flows. Perform RTL coding and functional verification...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 07 Oct 2025
Salary: $105470 - 158000 per year

Senior Reset and Boot ASIC Engineer

NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously.... You will be responsible for the RTL design, logic synthesis, and timing analysis of several modules. Integrate modules into the overall SOC...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 01 Oct 2025

Sr. Staff Static Timing Analysis (STA) Engineer

Physical Design team at Marvell in Santa Clara is seeking a Sr. Staff Static Timing Analysis (STA) Engineer to contribute... and closure on complex partitions. Develop and implement timing closure and logical ECO’s. Interface with the RTL design team...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 27 Sep 2025
Salary: $124420 - 186400 per year

CPU Silicon Validation Engineer

bring-up efforts. Description Work closely with CPU RTL and DV teams to understand changes to our CPU designs... and to engineer test content for new CPU features • Create CPU validation test plans, ensuring all key features are covered • Develop...

Company: Apple
Location: Santa Clara, CA
Posted Date: 19 Sep 2025