Verification Engineer to join our PCIe Express IP Products team in Bangaluru, India. The successful candidate will participate... in pre-silicon RTL Verification activities related to PCIe Controller SoftIP development, on leading-edge PCI-Express and CXL...
_ SMTS SILICON DESIGN ENGINEER THE ROLE: The candidate will get to work on the Verification of complex PLLs..., and verification in general. You are a team player who has excellent communication skills and experience in collaborating...
_ SMTS SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced physical design team..., Synthesis, Placement, CTS, , Routing, Extraction, Timing Closure (Tile level, Full chip), Physical Verification (DRC & LVS...
_ SMTS SILICON DESIGN ENGINEER THE ROLE: As a member of the Radeon Technologies Group, you will help bring to life... good communication and problem-solving skills. KEY RESPONSIBLITIES: Implementation and verification of DFT architecture...
_ SMTS SILICON DESIGN ENGINEER THE ROLE: Join AMD as we push the boundaries of what's possible in graphics and compute...: You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who...
_ SMTS PLATFORM EMULATION ENGINEER AMD is seeking a Platform Emulation Engineer to join our Data Center GPU organization... failures with design, verification, firmware, software, and emulation teams Research and enable new tools and infrastructure...
_ SMTS SOFTWARE SYSTEMS DESIGN ENGINEER THE ROLE: We are seeking an engineer to join our team that will thrive in a fast... Member Technical Staff (SMTS) – Embedded Software (Data Center & SPSE) AMD India (SPSE) is looking for a strong technical...
, Routing, Extraction, Physical Verification (DRC & LVS), EM/IR and signoff. Handling different PNR tools - Synopsys fusion... attention to detail. ACADEMIC CREDENTIALS: Qualification: Bachelors or Masters in Electronics/Electrical Engineering #LI...
_ SMTS SILICON DESIGN ENGINEER We are currently seeking a highly skilled 10+ years Performance Verification engineers... Responsibilities: Feature based performance Testplan, Test writing, performance verification, Arch model closure, RTL closure Shader...
_ SMTS SILICON ENGINEER - DFT VERIFICATION THE ROLE: The focus of this role is to strategize, plan, build, and execute... DFT verification for AMD’s next generation Server SoCs, resulting in no bugs in the final design. Drive post silicon bring...
_ SMTS FIRMWARE ENGINEER THE ROLE: We are looking for an experienced software/firmware developer, who have significant... Engineering, Electrical Engineering, or equivalent with 10-15 years of experience PREFERRED EXPERIENCE: Good understanding...
_ SMTS SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced CPU physical design..., CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), EM/IR and signoff. Handling different PNR...
_ SMTS SILICON DESIGN ENGINEER (AECG ASIC Physical Design & Implementation) THE ROLE: The focus of this role in the AECG... ASIC organization is to lead physical design for next generation ASICs that meet Engineering, Business and Customer...
_ SMTS PLATFORM EMULATION ENGINEER AMD is seeking a Platform Emulation Engineer to join our Data Center GPU organization... (Firmware, Software, Diags/tools, Validation, Apps) Triage failures with design, verification, firmware, software...
readiness/test coverage gaps. MBIST planning, implementation, and verification. Support Test Engineering on planning..._ SMTS SILICON DESIGN ENGINEER Circuit Technology team is looking for a passionate and experienced DFT Methodology...
_ SMTS SILICON DESIGN ENGINEER THE ROLE: As part of Circuits and Technology group, the ideal candidate will get to work... and power bounding box. Assist physical design team on the floor-planning and timing closure. Work with Design Verification...
_ SMTS SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced CPU physical design..., CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), EM/IR and signoff. Handling different PNR...
_ SMTS SILICON DESIGN ENGINEER THE ROLE: The position will involve working with a very experienced CPU physical design..., CTS, Timing Closure, Routing, Extraction, Physical Verification (DRC & LVS), EM/IR and signoff. Handling different PNR...