_ THE ROLE: AMD is looking for an ASIC Design STA engineer to contribute to the development of large SoCs, featuring... handoff for STA checks. collaborate with CAD on the development of pre-production synthesis (Design Compiler) and STA...
experience Experience with block/full chip SDC development in functional and test modes. Experience in Static Timing Analysis.../SDC Engineer with strong analytical skills and a deep understanding of timing constraints, including clock groups...
. Responsibilities; Perform Static timing analysis, glitch, noise analysis using Tempus Signoff tool. Executing and delivering...; 10+ years of experience in Static timing analysis, Individual should be able to lead and execute technical campaigns...
Job Title: STA/SDC Engineer Duration: 12+ Months Location: San Jose, CA Technical: Being a member of design team... who oversees fullchip STA/ SDCs and works with physical design and DFT teams to close fullchip timing in multiple timing...
in functional and test modes. Experience in Static Timing Analysis and prior working experience with STA tools like PrimeTime...Position: STA Engineer (eInfochips Inc) Job Description: Position: STA Engineer (eInfochips Inc) Location: San...
. Experience in Static Timing Analysis and prior working experience with STA tools like PrimeTime/Tempus Understanding of related...Technical: Being a member of design team who oversees fullchip STA/ SDCs and works with physical design and DFT teams...
in functional and test modes. Experience in Static Timing Analysis and prior working experience with STA tools like PrimeTime... with physical design and DFT teams to close fullchip timing in multiple timing modes. Option to also do block level RTL design...