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Keywords: Senior ASIC Power Engineer, Location: California

Page: 4

Senior Signal Integrity Engineer

Senior Signal Integrity Engineer The application window is expected to close 2/26/2026. The job posting may... to change at any time. Meet the Team The Cisco Service Provider SI team is seeking a Signal Integrity Engineer for the...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 26 Jan 2026

Senior Analog Design Engineer

Job Description: Senior Analog Design Engineer Architect I - Embedded Hardware Who We Are: Born digital, UST... across the world. Visit us at UST.com. You Are: We are looking for a hands-on senior-level engineer with good analog mixed...

Company: UST
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

Senior Timing Methodology Engineer

, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive... standard tools can offer. Work on various aspects of STA, constraints, timing and power optimization. What We Need...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

Senior Mask Layout Design Engineer

Are you a Mask Layout Design Engineer who is seeking an outstanding opportunity? We are looking for a Senior Mask..., power delivery circuits in state-of-the-art sub-micron CMOS technologies using Cadence tools You'll work with ASIC...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 24 Jan 2026

Senior Digital Design Engineer

We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group. In this role... the trade-off analysis for implementation, and deliver high performance, area and power efficient RTL Blocks. Craft...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 23 Jan 2026

Senior FPGA Engineer

Space Business Area is seeking a Senior FPGA Engineer to join our team in San Diego, CA. This is an exciting opportunity... with senior staff to determine design changes to improve FPGA performance. Collaborate with a multi-disciplined design team...

Company: Leidos
Location: San Diego, CA
Posted Date: 16 Jan 2026

Senior Verification Engineer – AI SoC Development

next-generation AI applications. As a Senior Verification Engineer, you will play a key role in ensuring the functional correctness... and robustness of complex ASIC designs for AI workloads. If you thrive in a fast-paced environment and enjoy solving challenging...

Company: Intel
Location: Folsom, CA
Posted Date: 04 Jan 2026

Senior Design Engineer – AI SoC Development

of AI hardware. Role Overview As a Senior SoC Design Engineer, you will be responsible for defining, implementing, and validating... of AI applications—from edge devices to data center accelerators. If you are an engineer with strong technical and communication skills...

Company: Intel
Location: Folsom, CA
Posted Date: 24 Dec 2025

Senior Formal Verification Engineer – AI SoC Development

for AI applications across edge and cloud. As a Senior Formal Verification Engineer, you will play a critical role in ensuring the... design, analyze power/performance, and uncover bugs. Debug and root-cause issues in the presilicon environment; implement...

Company: Intel
Location: Folsom, CA
Posted Date: 21 Dec 2025

Senior Distinguished Engineer

, generative AI fabrics, and global-scale networks that demand uncompromising performance. As a Senior Distinguished Engineer... Vision Serve as the principal architect for advanced networking ASICs focused on performance, scale-out capabilities, power...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 21 Dec 2025

(Senior) Engineer, DSP Systems Engineering, meoSphere

(Senior) Engineer, DSP Systems Engineering, meoSphere PROGRAMME DESCRIPTION meoSphere is SES's next-generation... blocks using multi-rate DSP techniques and ensure optimized implementation for low-power fixed point hardware (FPGA/ASIC...

Company: SES S.A.
Location: Long Beach, CA
Posted Date: 20 Dec 2025
Salary: $150000 - 190000 per year

(Senior) Engineer, DSP Systems Engineering, meoSphere

(Senior) Engineer, DSP Systems Engineering, meoSphere PROGRAMME DESCRIPTION meoSphere is SES’s next-generation... blocks using multi-rate DSP techniques and ensure optimized implementation for low-power fixed point hardware (FPGA/ASIC...

Company: SES
Location: Long Beach, CA
Posted Date: 19 Dec 2025
Salary: $150000 - 190000 per year

Senior SOC Design Engineer

with brilliant minds to build cutting-edge GPUs and SOCs that power everything from AI to gaming! As a Senior SOC Design Engineer...NVIDIA is looking for a Senior SOC Design Engineer to join our SOC Design team! At NVIDIA, you'll collaborate...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

Senior FPGA Engineer, LEO Payload FPGA

. The FPGA design engineer will work with systems teams to define/develop/implement/test/release FPGA based solutions... customer experience and optimization of target technology resources for cost/size/power/performance/features Basic...

Company: Amazon
Location: Sunnyvale, CA
Posted Date: 28 Feb 2026

Senior Hardware System Design Engineer

-noise analog power systems and other critical components. Collaborate closely with cross-functional teams, including ASIC... We are seeking a highly motivated Hardware Design Engineer with a strong focus on system design to join our dynamic team at Broadcom...

Company: Broadcom
Location: San Jose, CA
Posted Date: 19 Feb 2026
Salary: $120000 - 192000 per year

Senior Design Engineer – AI SoC Development

a wide range of AI applications, from edge devices to data center accelerators. If you are an engineer with strong technical... and perform quality checks across various logic design aspects ranging from RTL to timing/power convergence...

Company: Intel
Location: Folsom, CA
Posted Date: 04 Feb 2026

Senior Post Silicon Feature Development Engineer

Hardware Engineer to join our Silicon Solutions Group. In this role, you will lead system-design efforts to improve... bring-up plans. Lead system design partnering with architecture, software, chip/board designers, ASIC, and operations team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Jan 2026

Optical Engineer, Senior Staff

integrated component platforms with high speed Silicon photonics, transmit and receive amplifiers, controller ASIC’s with Marvell.... An engineer in this team will be involved in a full product lifecycle and will carry new products from inception all the way...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 09 Jan 2026
Salary: $130740 - 195800 per year

Senior Principal Engineer, Physical Design

and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data... Expect As a senior leader in the central physical design team, you will: Shape the long-term vision for physical design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025

Senior Staff Formal Verification Engineer

General Summary: QCT's Digital ASIC design team delivers cutting edge hardware and software products that power the user...

Company: Qualcomm
Location: San Diego, CA
Posted Date: 03 Mar 2026