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Keywords: Senior Timing Methodology Engineer, Location: Santa Clara, CA

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Senior Timing Methodology Engineer

, to amplify human inventiveness and intelligence. We are seeking an innovative Senior Timing Methodology Engineer to help drive..., self-heating, thermal impact, IR drop etc. Collaborate with technology leads, VLSI physical design, and timing engineers...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 20 Jul 2025

Senior Circuit Engineer - Custom Timing

We are now looking for a motivated Senior Circuit Engineer in Custom Timing to join our dynamic and growing team...’s next generation products. Develop timing models and methodology for custom macro design at transistor level along with ones using...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Sep 2025

Senior ASIC Timing Engineer

, to amplify human inventiveness and intelligence. We are now looking for a motivated ASIC Timing Engineer to join our dynamic... timing convergence flows working with the methodology teams. What we need to see: BS (or equivalent experience...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Sep 2025

Senior Methodology Engineer, CAD Tool Development

/Engineering or equivalent experience 3+ years of experience in VLSI CAD flows and methodology Timing closure and STA tool... on the world! We are currently looking for a Software/CAD engineer to join our team! In this role you'll be building...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 23 Jul 2025

Senior Signal and Power Integrity Engineer - Hardware

We are now looking for a Senior Signal & Power Integrity Engineer! NVIDIA has continuously reinvented itself over two.... Constant improvements of SI models using data from lab measurements and/or modelling tool/methodology updates. Substrate...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 16 Aug 2025

Senior SoC Design Engineer

with architects, chip leads, and customers on SoC IP design, timing closure, power analysis, methodology alignment, and program... to do their best work. Come join the team and see how you can make a lasting impact on the world. Join NVIDIA as a Senior SoC Design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 15 Jul 2025

Senior IP Design Verification Engineer

of a future Intel CPU. This position requires and Engineer with broad Physical Design and Static Timing Analysis skills, coupled... with leadership skills necessary to drive methodology and to collaborate effectively with multiple functional teams within the CPU...

Company: Intel
Location: Santa Clara, CA
Posted Date: 21 Sep 2025

Senior IP Design Verification Engineer

, we are building a better tomorrow. Who We Are We are seeking a highly skilled Verification Engineer to work on verification... and timing, and uncover bugs. Replicates, root causes, and debugs issues in the presilicon environment. Finds and implements...

Company: Intel
Location: Santa Clara, CA
Posted Date: 18 Sep 2025

Senior System Integration Engineer

and debug. Strong EE fundamentals, knowledgeable in digital design, computer architecture, power analysis, timing analysis... matrix organization. Driven process/methodology improvements. Our technology has no boundaries! NVIDIA is building the...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 23 Sep 2025

Senior Principal Digital IC Design Engineer

tasks Work with multiple design centers and design groups to shape future methodology Support the post silicon team... microprocessors. RTL design experience, synthesis, static-timing closure, formal verification, gate-level simulations, and block...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 14 Aug 2025