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Keywords: Senior ASIC Timing Engineer, Location: Santa Clara, CA

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Senior ASIC Timing Engineer

, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Timing Engineer... inventiveness and intelligence. What you'll be doing: Drive timing analysis and closure of Nvidia’s GPUs, CPUs, DPUs and SoCs...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

Senior ASIC Timing Engineer

Timing Engineer to join our dynamic and growing team. If you want to challenge yourself and be a part of something great... to do their best work. Come join the team and see how you can make a lasting impact on the world. We are now looking for a motivated ASIC...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 13 Mar 2026

Senior Staff Engineer, Static Timing Analysis (STA) Engineer

Physical Design team at Marvell in Santa Clara is seeking a Senior Staff Engineer, Static Timing Analysis (STA) Engineer... within a collaborative and innovative environment at Marvell. Perform timing analysis and closure on complex partitions Work with design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Feb 2026
Salary: $131010 - 196300 per year

Senior ASIC Design Engineer

NVIDIA is looking for a Senior ASIC Design Engineer to join our Memory Subsystem Team! As a Senior ASIC Design... engineer at NVIDIA, you'll join a group of hard-working engineers to design and implement innovative coherent fabrics...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Feb 2026

Senior ASIC Design Engineer

NVIDIA is looking for an outstanding Senior ASIC Design Engineer to build and implement leading SoCs and GPUs.... A deep understanding of ASIC flow including RTL, verification, logic synthesis, timing analysis, ECO, and post silicon debug...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 01 Feb 2026

Senior ASIC Physical Design Engineer, Netlisting

, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer... quality checks, etc. Help in all aspects of physical design, such as driving timing convergence, timing constraints...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 09 Jan 2026

Senior ASIC Design Engineer, Memory Controller

NVIDIA is looking for a Senior ASIC Design Engineer for our Memory Controller team! As a Senior ASIC Engineer, you'll... and design including RTL design, synthesis, functional verification, and timing analysis using groundbreaking CAD tools and using...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Dec 2025

Senior ASIC RTL Integration and Netlisting Engineer

to do their best work. Come join the team and see how you can make a lasting impact on the world. We are now looking for a motivated ASIC... RTL integration and netlisting engineer to join our dynamic and growing team. If you want to challenge yourself...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Jan 2026

Senior ASIC Design Engineer - Hardware

We are now looking for an ASIC Design Engineer. NVIDIA is seeking best-in-class ASIC Design Engineers to design...-architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design. Support post-silicon validation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Dec 2025

ASIC/RTL Design Engineer - Senior (US)

. Experience in integrating ASIC IP into an SOC. Experience with synthesis, static timing analysis & optimizations. Nice... for an SOC. - Must have proven track record of ASIC design on several production tape-outs. - Experience with Lint, CDC, RDC...

Company: Managed Staffing
Location: Santa Clara, CA
Posted Date: 06 Mar 2026

ASIC/RTL Design Engineer - Senior (US)

. Experience in integrating ASIC IP into an SOC. Experience with synthesis, static timing analysis & optimizations. Nice... for an SOC. - Must have proven track record of ASIC design on several production tape-outs. - Experience with Lint, CDC, RDC...

Company: Managed Staffing
Location: Santa Clara, CA
Posted Date: 05 Mar 2026

Senior ASIC RTL Design Engineer

: Background in digital IP/ASIC design and Verilog-based RTL development. Familiarity with the full IP design cycle, including..., timing closure, and post-silicon validation. Experience with front-end EDA tools, sign-off flows, and low-power design...

Posted Date: 20 Feb 2026

Senior ASIC Engineer

, stronger relationships, and the kind of precision that drives great outcomes. Job Description Your Career Join our ASIC... features. Partner with physical-design teams: review synthesis/timing reports, rewrite RTL to close critical paths, and consult...

Location: Santa Clara, CA
Posted Date: 04 Feb 2026

Senior Digital Design Engineer

We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group. In this role... micro-architecture specification, implement in high-quality RTL, and deliver a fully verified, synthesis and timing clean...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 13 Mar 2026

Senior Systems Prototyping Engineer

prototyping platforms. We are now looking for a Senior Systems Prototyping Engineer to join our Emulation team onsite in Santa...Are you passionate about DGX system connecting multiple ASIC chips together and FPGA prototyping? Are you interested...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 04 Mar 2026

Senior Digital Design Engineer

We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group. In this role... micro-architecture specification, implement in high-quality RTL, and deliver a fully verified, synthesis and timing clean...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 23 Jan 2026

Senior Logic Design Engineer

technology and enrich lives globally. As an IP Logic Design Engineer, you will play a critical role in developing next-generation... and ensure their implementation in the block being designed Optimize design logic to meet power, performance, area, and timing...

Company: Intel
Location: Santa Clara, CA
Posted Date: 13 Mar 2026

Senior Post Silicon Feature Development Engineer

Hardware Engineer to join our Silicon Solutions Group. In this role, you will lead system-design efforts to improve... bring-up plans. Lead system design partnering with architecture, software, chip/board designers, ASIC, and operations team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 28 Jan 2026

Senior Design Verification Engineer

stakeholders to ensure the delivery of high-quality, robust IPs to SoC product teams 3+ years of practical ASIC design verification... techniques is a strong plus Experience with gate-level simulation (GLS) and timing-aware verification is a plus Proficiency...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 02 Mar 2026

SOC IP Methodology Engineer - Custom SOC

Nvidia is hiring a Senior SOC/IP Methodology Engineer to help design and architect next generation custom SoC/IP... expert, able to traverse from Synthesis to final design closure (timing and layout) involving latest EDA technologies...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Jan 2026