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Keywords: ASIC/RTL Design Engineer - Senior (US), Location: Santa Clara, CA

Page: 1

ASIC/RTL Design Engineer - Senior (San Jose, Ca) - AMDJP00004484

Position Title: ASIC/RTL Design Engineer Location: Santa Clara, CA Position Status: Contract Pay Rate: 75/hr.... - Knowledge AND hand-on experience from industry ASIC design flow including RTL coding, IP Integration, debugging/verification...

Company: Seneca Resources
Location: Santa Clara, CA
Posted Date: 24 Sep 2025
Salary: $75 per hour

Senior ASIC Design Engineer - DFX

We are now looking for a Senior ASIC Design Engineer - DFX NVIDIA has continuously reinvented itself over two decades... Engineering or related field. 5+ years of hands-on experience in SoC architecture, RTL design, and verification...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 26 Oct 2025

Senior ASIC Physical Design Engineer, Netlisting

, to amplify human inventiveness and intelligence. We are now looking for a motivated Senior ASIC Physical Design Engineer... of hardware architecture and hands-on skills in RTL/logic design for timing closure. Experience in clock-domain-crossing...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 08 Oct 2025

Senior ASIC Design Engineer - Circuits

We are now looking for a motivated Senior ASIC Design Engineer to join our dynamic and growing team in our Circuit... Partner with RTL and Design Verification engineers to ensure delivery meets performance and quality expectations. Work...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 27 Aug 2025

Senior ASIC Design Engineer – Clocks IP

ASIC engineer to join the team. The Team is responsible for crafting all aspects of GPU and CPU clocking. The team... of timing closure to innovate and implement new Clocking topologies in RTL. Collaborate with Physical design and timing team...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

Senior Reset and Boot ASIC Engineer

NVIDIA is looking for a Senior Reset and Boot ASIC Engineer to join our System ASIC team! NVIDIA has continuously... of system-level functions like Reset or Chip Boot Solid frontend ASIC design skills, including RTL design, asynchronous...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 01 Oct 2025

Senior ASIC Engineer

will have: *RTL Design *ASIC front-end experience *Scripting Languages knowledge (e.g. Perl or Python) Minimum Qualifications...: • Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 02 Nov 2025
Salary: $126700 - 190100 per year

Senior ASIC Verification Engineer - GPU

of verification experience Exposure to Computer Architecture, ASIC design and verification methodology is required Strong ability...NVIDIA is seeking best-in-class ASIC Verification Engineers to verify the world’s leading GPUs. In this role...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 11 Oct 2025

Senior Logic Design Engineer– Physical Design

physical design is preferred. Verilog expertise is required as is a deep understanding of ASIC design flow including RTL...We are now looking for a Logic Design Engineer with Physical Design background! As a member of our CPU Logic Design...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Sep 2025

Senior Principal Digital IC Design Engineer

in one or more of the following areas: NPU, embedded processors, DSP, graphics, and general-purpose microprocessors. RTL design experience..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Our design team works on state...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 30 Oct 2025

Digital IC design Engineer

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact As a Hardware Design Senior Staff... Engineer with Marvell, you’ll be a member of the Custom compute and solutions group. Our design team works on state-of-the-art...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Nov 2025
Salary: $121400 - 181800 per year

Principal Engineer, Physical Design

RTL, verification, and CAD, to ensure cohesive and optimized design execution. Mentor and coach senior and junior... and execution, Marvell’s custom Processor/ASIC solution offers a differentiated approach with a best-in-class portfolio of data...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 29 Oct 2025
Salary: $146850 - 220000 per year

AI/ML Design Verification Methodology Lead Engineer

's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration..., or related work experience. OR Master's degree in Science, Engineering, or related field and 5+ years of ASIC design...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 10 Oct 2025

Senior Memory Controller Verification Engineer

NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC Memory Subsystem... experience. 3+ years of ASIC verification experience of complex design units displaying good attention to detail, teamwork...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 03 Oct 2025

Senior Systems Prototyping Engineer

prototyping platforms. We are now looking for a Senior Systems Prototyping Engineer to join our Emulation team onsite in Santa... Clara, CA. What you'll be doing: Build FPGA prototypes by making RTL FPGA-friendly, partitioning the design and taking...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 18 Sep 2025

Senior Architecture Energy Modeling Engineer

, you will collaborate with Architects, ASIC Design Engineers, Low Power Engineers, Performance Engineers, Software Engineers, and Physical... architecture and interest in energy-efficient GPU designs. Familiarity with Verilog and ASIC design principles...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 06 Sep 2025

GPU Power Architect/Microarchitect Lead

, VLSI and IP design fundamentals Deep familiarity with ASIC/SoC Design cycles and methodologies including RTL, Verification... engineer you will drive the microarchitecture and RTL optimizations and methodologies required to achieve the product power...

Posted Date: 09 Oct 2025