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Keywords: Senior Digital Design Engineer - High-Speed I/O and Photonics, Location: Santa Clara, CA

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Senior Digital Design Engineer - High-Speed I/O and Photonics

working on a wide range of high-speed, powerful DSPs, silicon photonics IPs, and chips. You will participate in chip-level... to See B.S. or M.S. degree in Electrical Engineering or equivalent experience. 5+ years of experience in high-speed digital...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Sep 2025

Senior Staff Post-Silicon Validation Engineer, High Speed SERDES

Senior Staff Engineer at Marvell, you’ll be helping to deliver high bandwidth over long distances. This team performs analog... with 3-5 years of experience. Strong understanding of high-speed SERDES, equalization technique and PCIe protocols. 6-10...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 04 Oct 2025
Salary: $121400 - 181800 per year

Senior AI Research Engineer/Scientist

and development (R/D) purposes. The Senior AI Research Engineer/Scientist responsibilities include (but are not limited to): Define.... Develop simulation methodologies for scalable electro-photonic systems. Design digital and mixed-signal accelerators...

Company: Intel
Location: Santa Clara, CA
Posted Date: 22 Nov 2025

Senior Optical System Test Engineer

and motivated Senior Optical System Test Engineer to join our hardware engineering team. In this role, you will be responsible..., linear drivers, linear TIAs, and DSPs, supporting next-generation high-speed optical transceivers and photonic systems...

Company: Arista Networks
Location: Santa Clara, CA
Posted Date: 29 Oct 2025

Senior Staff Silicon Validation Engineer

Senior Staff Engineer at Marvell, you’ll be helping to deliver high bandwidth over long distances. This team performs analog... fields with 3-5 years of experience. Strong understanding of high-speed SERDES, equalization technique and PCIe protocols...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 01 Oct 2025
Salary: $121400 - 181800 per year

Senior Hardware Engineer

experience with designing PDN for high-speed DSP, RFICs, manage PI and SI requirements, actively guide layout engineer and manage... high speed designs thru product design verification tests and independent PCBA characterization. Troubleshoot and optimize...

Company: Intel
Location: Santa Clara, CA
Posted Date: 26 Nov 2025