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Keywords: Senior High Speed SerDes Validation Engineer, Location: Santa Clara, CA

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Senior Staff Post-Silicon Validation Engineer, High Speed SERDES

Senior Staff Engineer at Marvell, you’ll be helping to deliver high bandwidth over long distances. This team performs analog... with 3-5 years of experience. Strong understanding of high-speed SERDES, equalization technique and PCIe protocols. 6-10...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 04 Oct 2025
Salary: $121400 - 181800 per year

Senior High Speed SerDes Validation Engineer

instrumentations like Oscilloscopes (Digital Multi Meter) High-speed SERDES validation experience (50GBaud...We are now looking for a Senior Validation Engineer in the DGX Server Product Engineering Team. In this role...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Aug 2025

Senior High-Speed IO Validation Engineer

Excellent knowledge of Signal integrity concepts, Silicon characteristics and high speed/SERDES functional validation..., to amplify human imagination and intelligence. Make the choice to join us today. We are now looking for a Senior High-Speed...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 14 Aug 2025

SERDES Validation Director

/ Senior Principal SERDES signal integrity engineer to lead the validation and applications engineering team for SERDES IP... and manage the SERDES validation and applications engineering teams for the BU. Provide applications engineering support to major...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 19 Sep 2025

Senior Staff Silicon Validation Engineer

Senior Staff Engineer at Marvell, you’ll be helping to deliver high bandwidth over long distances. This team performs analog... fields with 3-5 years of experience. Strong understanding of high-speed SERDES, equalization technique and PCIe protocols...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 01 Oct 2025
Salary: $121400 - 181800 per year

Senior Mixed Signal Design Validation Engineer

, you will be responsible for the bring-up and characterization of high-speed mixed-signal circuits, in addition to performing system validation...: Build validation test suites for high-speed I/Os and the analog circuits Conduct detailed characterization of analog...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Aug 2025

Data Center Optical Transceiver Design and System Validation Engineer

-DD, OSFP, QSFP112, and 400G/800G/1.6T module design and qualification Proficient in high-speed SerDes design..._ THE ROLE: We are looking for a Senior Engineer to lead the design, qualification, and system-level testing of data...

Posted Date: 22 Aug 2025

Senior Distinguished Engineer

die-to-die (D2D) interfaces, to enhance system integration and performance. High-Speed SerDes Integration: Collaborate with SerDes... connecting our world. As a Senior Distinguished Engineer, you will be a pivotal member of our architecture team, driving...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 19 Sep 2025

Senior Staff Analog Mixed Signal IC Design Engineer

will be leading the high-speed and high performance SerDes development in advanced technology nodes, 5nm, 3nm, 2nm... and beyond. Design IP that includes but not limited to 224G/112G/56G PAM4; 32G PAM2; Die-to-Die High Speed Interconnect; System PLL IPs...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 19 Sep 2025
Salary: $140350 - 210200 per year

Senior Staff Application Engineer

or more of related professional experience. Familiarity with high-speed PCB layout, signal integrity, board assembly, and manufacturing.... Experience in using lab equipment including high speed oscilloscopes, spectrum analyzers, logic/protocol analyzers, and traffic...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Aug 2025
Salary: $121400 - 181800 per year

Senior Staff Analog Mixed-Signal Design Engineer

technologies, with a focus on SerDes (Serializer/Deserializer) die-to-die communication and high-speed wireline design. Design... organization but also to the technological arc of innovation for future generations of Marvell's high-speed wireline and optical...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Aug 2025
Salary: $140350 - 210200 per year

IC Application Engineer Intern - Masters Degree

and sells High speed SerDes ASICs for Ethernet, PCie and emerging standards and proprietary customer rates. Our team ensures..., engineering, sales, and operations What We're Looking For Seeking BS (rising senior or recent graduate) or MS (currently...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 21 Sep 2025
Salary: $27 - 53 per hour