Job Title: Senior RTL Design Engineer Position Description: Protingent Staffing has an exciting contract Senior RTL... Design Engineer with our client located in Folsom, CA.. Job Responsibilities: Participates in the definition...
of AI hardware. Role Overview As a Senior SoC Design Engineer, you will be responsible for defining, implementing, and validating... Science or related field with 10+ years of experience. 7+ years of experience in RTL design and implementation for ASIC/SoC...
and delighting our customers. The Physical Design Integration Engineer performs physical design implementation of custom CPU... designs from RTL to GDS to create a design database that is ready for manufacturing. Conducts all aspects of the CPU...
and perform quality checks across various logic design aspects ranging from RTL to timing/power convergence... Science 7+ years of experience in RTL design and implementation for ASIC/SoC development Preferred Qualifications...
and perform quality checks across various logic design aspects ranging from RTL to timing/power convergence..., Computer Engineering, or Computer Science 7+ years of experience in RTL design and implementation for ASIC/SoC development...
next-generation AI applications. As a Senior Verification Engineer, you will play a key role in ensuring the functional correctness... work with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams...
next-generation AI applications. As a Senior Verification Engineer, you will play a key role in ensuring the functional correctness... work with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams...
for AI applications across edge and cloud. As a Senior Formal Verification Engineer, you will play a critical role in ensuring the... corrective measures. Collaborate with architects, RTL developers, and physical design teams to improve verification of complex...
next-generation AI applications. As a Senior Verification Engineer, you will play a key role in ensuring the functional correctness... work with SoC architects, microarchitects, full chip architects, RTL developers, postsilicon, and physical design teams...