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Keywords: SoC Physical Design Engineer, PnR, Location: Austin, TX

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SoC Physical Design Engineer, PnR

, physical synthesis, floor-planning, place and route (PnR), power grid, timing (STA), physical design verification (DRC/LVS... next groundbreaking Apple product! In this visible role, you will be directly responsible for the physical implementation of design...

Company: Apple
Location: Austin, TX
Posted Date: 28 Sep 2025

SoC Physical Design Engineer, PnR

, physical synthesis, floor-planning, place and route (PnR), power grid, timing (STA), physical design verification (DRC/LVS... next groundbreaking Apple product! In this visible role, you will be directly responsible for the physical implementation of design...

Company: Apple
Location: Austin, TX
Posted Date: 28 Sep 2025

CPU Full Chip Physical Integration Engineer

of customers quickly. Description As a Full Chip Integration Engineer, you will be participating in the physical design... teams during the entire chip design cycle to drive signoff closure for tapeout • Work with the SOC team to meet IP technical...

Company: Apple
Location: Austin, TX
Posted Date: 25 Jul 2025

CPU Full Chip Physical Integration Engineer

of customers quickly. Description As a Full Chip Integration Engineer, you will be participating in the physical design... teams during the entire chip design cycle to drive signoff closure for tapeout • Work with the SOC team to meet IP technical...

Company: Apple
Location: Austin, TX
Posted Date: 25 Jul 2025

Senior Low-Power Design & Optimization Engineer - Remote

: U.S. Citizen or Green Card holder. Senior Low-Power Design & Optimization Engineer Description: Leads low-power architecture.... Requirements: 8+ years’ experience in low-power SoC design flows. Strong background in Cadence low-power flows (Voltus, Innovus...

Company: Encore Semi
Location: Austin, TX
Posted Date: 04 Oct 2025
Salary: $140000 - 160000 per year

Senior Low-Power Design & Optimization Engineer - Remote

: U.S. Citizen or Green Card holder. Senior Low-Power Design & Optimization Engineer Description: Leads low-power architecture... PPA targets. Requirements: 8+ years' experience in low-power SoC design flows. Strong background in Cadence low-power...

Company: Encore Semi
Location: Austin, TX
Posted Date: 03 Oct 2025
Salary: $140000 - 160000 per year

Design Technology Co-Optimization (DTCO) Engineer, Design flow and Methodology

-specific SOC design styles. You have expertise in one or many technical areas, including concepts of logic/physical synthesis... design and analysis flows and methodologies for DTCO. With strong expertise in digital design flows spanning synthesis, PnR...

Company: Samsung
Location: Austin, TX
Posted Date: 27 Aug 2025

GPU Electrical Analysis Engineer

on experience in physical design and large chip integration. Description As a GPU Electrical Analysis engineer, you will work... closely with the Physical Design team to design power grid specification that achieves the best balance between power...

Company: Apple
Location: Austin, TX
Posted Date: 03 Aug 2025