System Signal/Power Integrity Engineer Responsibilities Support high data rate SerDes applications - up to 112Gbps... NRZ and 224G PAM4 systems System level Signal and Power Integrity design trade-offs and debug. Collaborate...
of synchronous design practices and data flow management (FIFOs, memories, pipelining). Experience in signal and power integrity... Engineer (FPGA) for its New Product Development (NPD) team to design and develop software controls for our RF Generator Systems...