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Keywords: Systems Verification Engineer, Location: Santa Clara, CA

Page: 5

Digital IC Principal Design Engineer

functionality. Collaborate with verification engineer to develop exhaustive test cases to ensure successful design. Work closely... Engineer at Marvell, you will be a member of the Custom Compute Solution IP development team. This team develops uniquely high...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 03 Dec 2025
Salary: $146850 - 220000 per year

Lead Analog SerDes Architect/Design Engineer

from 400G today to 1.6T+ tomorrow. We are seeking a Lead Analog SerDes Architect / Design Engineer to join our team and shape... developing key integrated circuit components the engineer must be able to work collaboratively leading block level development...

Company: Intel
Location: Santa Clara, CA
Posted Date: 03 Dec 2025

ASIC Methodology Engineer

, etc.) and their application in real-world solutions, such as chatbots, etc. Experience designing and developing agentic AI systems Experience..., verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 25 Feb 2026
Salary: $153200 - 229800 per year

Senior PIC Design Engineer

to advance, the performance drivers for data center infrastructure are shifting from systems-on-chip (SOCs) to systems of chips... and top-level block placement to micro-architecture, optical & electrical routing, and back-end DRC and LVS verification...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 25 Feb 2026
Salary: $113900 - 168500 per year

Staff Engineer, Application Engineering

expert guidance on the integration of Marvell's SerDes IP into their systems. Technical Support: Provide hands-on technical... requirements and provide expert guidance on the integration of Marvell's SerDes IP into their systems. Technical Support: Provide...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 21 Feb 2026
Salary: $111070 - 166400 per year

Senior ASIC RTL Design Engineer

that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded..., and verification who enjoy solving complex technical challenges. Ideal candidates communicate clearly, work effectively in cross-site...

Posted Date: 20 Feb 2026

SOC Design Engineer

, performance, area, timing goals, and design integrity for physical implementation. Reviews the verification plan... and implementation to ensure design features are verified correctly across verification hierarchies, drives unit level verification...

Company: Intel
Location: Santa Clara, CA
Posted Date: 20 Feb 2026

Firmware Development Engineer, Sr. Staff

and verification, in pre-silicon and post-silicon environments. Assist in the definition Power Management solutions for future... designs. Minimum Qualifications: • Bachelor's degree in Engineering, Information Systems, Computer Science, or related field...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 14 Feb 2026

ASIC Methodology Engineer

, etc.) and their application in real-world solutions, such as chatbots, etc. Experience designing and developing agentic AI systems Experience..., verification, validation, integration, or related work experience. OR Master's degree in Science, Engineering, or related field...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 13 Feb 2026

EDA Flow Engineer

scalable data pipelines and models, and integrating AI-driven solutions into production CAD and verification flows.... Responsibilities: Identify and prioritize high-impact opportunities to apply AI/ML to chip design and verification workflows...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 06 Feb 2026
Salary: $110000 - 145000 per year

Analog Design Engineer

-level design, simulation, and verification of analog circuits using Cadence Virtuoso. Design analog building blocks... efficiency. Carry out comprehensive post-layout verification, including Parasitic Extraction (PEX), Design Rule Check (DRC...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 04 Feb 2026
Salary: $156853 - 160000 per year

Sr Principal Engineer Hardware

of the System Architecture team at Palo Alto Networks, you will work on the development of ASICs, FPGAs and Systems... Development - Assembler, Debugger, Simulator Infrastructure to support ASIC team development and verification ASIC microcode...

Location: Santa Clara, CA
Posted Date: 30 Jan 2026

Senior Staff Post-Silicon Validation Engineer

compute fabrics inside accelerated servers, general-purpose servers, CXL systems and disaggregated infrastructure, the Alaska... and performance verification to ensure the integrity of our data communication solutions Characterize and validate PCIe, high speed...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 22 Jan 2026
Salary: $121400 - 181800 per year

Design Engineer - Sensors

devices. Job activities span the ASIC design process from specification definition, high-level design, coding and verification... of Systems, as well as other SoC team ASIC designers and software engineers to micro-architect and implement designs specific...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 18 Jan 2026

Senior ASIC RTL Design Engineer

that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded... processor architecture, digital design as well as verification/design quality. You are a team player who has excellent...

Posted Date: 26 Dec 2025

Sensor Characterization Engineer

image quality measurement, calibration, evaluation, analysis and ISP verification tools; Conduct modeling and simulation... of imaging systems, image sensor readout circuit and image sensor digital timing; Focus on mobile image sensor projects...

Company: OmniVision
Location: Santa Clara, CA
Posted Date: 20 Dec 2025
Salary: $156853 - 160000 per year

Principal Interconnect Micro-architect and RTL Design Engineer

that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded... and performance/power. In this role the candidate will work with IP and SOC Architecture team, RTL design team, verification team...

Posted Date: 16 Dec 2025

Senior ASIC Design Engineer

verification teams, synthesis, timing and back-end teams to accomplish your tasks. What we need to see: Masters Degree... and development. Experience in micro-architecture and RTL development of complex designs in Verilog. Exposure to Digital systems...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 10 Dec 2025

Analog Design Engineer

that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded... and timing analysis, and reliability checks. Interface with cross-functional teams like RTL, Verification and Physical Design...

Posted Date: 09 Dec 2025

Lead NoC Performance Architect

for future SoC designs. Required for this Role: MS/PhD in Computer Science/Computer Engineering/Electrical Engineer with 8.../Computer Engineering/Electrical Engineer with 10+ years of experience in CPU / SoC performance/power modeling, analysis / debug...

Company: Qualcomm
Location: Santa Clara, CA
Posted Date: 25 Feb 2026