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Keywords: Design Lead - DFT, Location: India

Page: 6

Senior SoC Director ( Bangalore )

for low power and high speed, design for test (DFT) System modeling, RTL coding, Lint / CDC checking, simulation, synthesis... with architecture, physical design, and design teams to lead the implementation of the digital architecture. Develop and refine...

Company: Best NanoTech
Location: Karnataka
Posted Date: 14 Jan 2026

Principal Engineer - Memory Compiler Tiler/CAD

Technical: Custom memory circuit design (sense amps, periphery), analog/digital CMOS, semiconductor physics, DFT, Verilog/VHDL..., above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Principal Engineer - Tiler/CAD Work...

Company: Marvell
Posted Date: 14 Jan 2026

Hardware Engineer (Hish Speed)

Title: Hardware Engineer (Hish Speed) Location: Bangalore Exp: 3-6yrs Job Description: Lead hardware design... and development for ADAS, Cockpit, and Connectivity ECUs, from concept to production. Design high-speed digital boards with advanced...

Company: NR Consulting
Posted Date: 11 Jan 2026

Staff Engineer

) at block and SoC level designs. Define and evaluate constraints and signoff Test/DFT mode timing requirements. Knowledge... sign-off including timing margin calculationsindependently, hands-on STA lead of projects. Experience in handling STA...

Company: Infineon
Posted Date: 10 Jan 2026

Hardware/SOC Validation Engineer

Familiarity with x86 Debug Tools ,DFT (Design for Testability) Good understanding of DFT /JTAG 1149.x / BMC (Baseboard management... Test strategy, Test plan and Test execution Work under minimal supervision Lead Quality assurance tasks and enhance...

Posted Date: 10 Jan 2026

Senior Engineer- RTL

Job Requirements Lead RTL design activities for complex digital blocks and guide the team from architecture to tape...-power design knowledge (UPF / CPF) Exposure to DFT and formal verification Work Experience Required Skills & Experience...

Company: Quest Global
Posted Date: 09 Jan 2026

Senior Product Test Engineer

of the Perl/C++ programming Be experienced in ATE high-speed digital h/w design & layout, with lead skills in understanding... and software test solutions for our ASIC BU product portfolio. Key responsibilities include: Design of innovative, reliable...

Posted Date: 26 Dec 2025

Senior Electrical Engineer

and DFT experience Experience of writing Requirement specification, detailed design, test requirement and test report... more on Cubic.com. Job Details: Job Title: Senior Electronic Design Engineer Job Summary: To Successfully design, develop...

Company: Cubic
Posted Date: 19 Dec 2025

Senior Hardware Engineer – VCU Development - Pune

electronics to lead and contribute to the design, development, validation, and production release of Vehicle Control Units (VCUs... Lead hardware architecture, design, and development of VCUs for ICE / EV / Hybrid applications. Define system...

Posted Date: 18 Dec 2025

Associate III - VLSI PDN EMIR

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... architecturec. Strong knowledge in Physical Design / Circuit Design / Analog Layout d. Strong understanding of Synthesis DFT...

Company: UST
Posted Date: 17 Dec 2025

Associate III - VLSI STA

of RTL Design/Module and provide support to junior engineers in Verification/PD/DFT/Circuit Design/Analog Layout/STA... architecturec. Strong knowledge in Physical Design / Circuit Design / Analog Layout d. Strong understanding of Synthesis DFT...

Company: UST
Posted Date: 16 Dec 2025

Principal Engineer, STA & Synthesis

and modes Ensure sign-off compliance for timing, power, and signal integrity Work closely with RTL, DFT, and physical design...Job Description We are seeking a Principal Engineer - Implementation Lead to own synthesis and timing closure sign...

Posted Date: 16 Dec 2025

Principle/Staff STA Engineer

, and other advanced timing checks (e.g., OCV, AOCV, EMIR, X-talk). Collaborate closely with design, DFT, physical design.... --- Job Responsibilities Lead and perform comprehensive Static Timing Analysis (STA) at the block, sub-system, and SoC levels for cutting...

Posted Date: 12 Dec 2025

Staff Synthesis & STA Engineer

in Digital Synthesis, DFT insertion, Check Design and Check Timing Analysis Good understanding of all aspects of liberty models... About the Role As a Staff Synthesis & STA Engineer, you will own lead & own Synthesis & STA for complex high performance ICs...

Posted Date: 12 Dec 2025

SOC Verification Engineer: Security DV

and integration. Add on responsibility SOC Integration after having co-ordination with IPs, SOC (Design, DFT & PD) teams... your career. SENIOR SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: Security DV ): Work on SOC level...

Posted Date: 10 Dec 2025

Staff Engineer, STA

, Tempus). Implement ECOs for timing fixes and validate changes. Collaborate with RTL, physical design, and DFT teams... Business Unit (DBU) is seeking a Staff STA Engineer to lead timing sign-off and closure for complex mixed-signal SoCs...

Posted Date: 06 Dec 2025

NPU / AI Processor Synthesis Engineer

-cycle paths, and false paths. Cross-Functional Collaboration Work closely with RTL design, DFT, and physical design... General Summary: Job Description Role Overview The NPU Synthesis Lead will be responsible for driving synthesis...

Company: Qualcomm
Posted Date: 06 Dec 2025

Senior ASIC Engineer, Switch SoC

. Good teamwork spirit and collaboration skills with team members. Experience in synthesis, physical design and DFT... is a plus. Background in RTL Build and Design Automation is a plus. Ways to stand out from the crowd: Chip lead type of technical...

Company: Nvidia
Posted Date: 05 Dec 2025

SOC level verification - PCIE, USB, Ethernet

your career. SDE/MTS/SMTS SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: GDP DV ): Work on SOC level... will be responsible for verifying and integration. Add on responsibility SOC Integration after having co-ordination with IPs, SOC (Design...

Posted Date: 28 Nov 2025

NPU/AI Processor Synthesis Staff Engineer

-cycle paths, and false paths. Cross-Functional Collaboration Work closely with RTL design, DFT, and physical design... General Summary: Role Overview The NPU Synthesis Lead will be responsible for driving synthesis and timing closure...

Company: Qualcomm
Posted Date: 27 Nov 2025