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Keywords: FPGA/RTL Design Engineer, Location: San Jose, CA

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FPGA/RTL Design Engineer

Job Description & Skill Requirement: Design & Implementation: Develop RTL code (Verilog, VHDL, SystemVerilog..., debug FPGA designs, and resolve design issues. Validation & Testing: Create unit tests, example designs, and demos; ensure...

Posted Date: 19 Nov 2025

RTL Design Engineer

your career. THE ROLE: Join our leading-edge Design and RTL Methodology team as a Hardware Development Engineer, contributing... directly to the development of our latest FPGA products. In this role, you will help ensure the highest quality of RTL design...

Posted Date: 21 Nov 2025

Senior Staff RTL Design Engineer

your career. THE ROLE: We are looking for a self-motivated senior design engineer to be part of a leading team to drive..., you will focus on RTL design and validation of high-speed interfaces such as chip-to-chip interconnect, both on system and on package...

Posted Date: 09 Nov 2025

Sr RTL Design Engineer (Floating Point Architecture) - Remote

Job Title: Senior RTL Design Engineer – Floating Point Architecture Location: Remote (Anywhere in USA) Full-time...: Salary + Benefits + Bonuses About the Role We are seeking a Senior RTL Design Engineer with strong expertise in floating...

Company: Encore Semi
Location: San Jose, CA
Posted Date: 01 Nov 2025
Salary: $140000 - 160000 per year

Sr RTL Design Engineer (Floating Point Architecture) - Remote

Job Title: Senior RTL Design Engineer - Floating Point Architecture Location: Remote (Anywhere in USA) Full-time...: Salary + Benefits + Bonuses About the Role We are seeking a Senior RTL Design Engineer with strong expertise in floating...

Company: Encore Semi
Location: San Jose, CA
Posted Date: 01 Nov 2025
Salary: $140000 - 160000 per year

Senior RTL Design Engineer

your career. THE ROLE: We are looking for a self-motivated senior design engineer to be part of a leading team to drive..., you will focus on RTL design and validation of high-speed interfaces such as chip-to-chip interconnect, both on system and on package...

Posted Date: 08 Oct 2025

FPGA/ASIC Engineer

-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA... methodology. Option to engage in block-level RTL design or block or top-level IP integration. Collaborate with Software, Design...

Company: Nesco Resource
Location: San Jose, CA
Posted Date: 18 Sep 2025
Salary: $60 - 65.33 per hour

Senior Principal Emulation Design Engineer

. We are seeking a highly skilled Design Engineer to join our Palladium Solutions Development team, to drive the development of full... and status monitoring. SystemVerilog for synthesizable RTL design C and Python for modeling, scripting, and automation Lab...

Posted Date: 19 Nov 2025

Senior Applications Engineer – DDR Design IP

Applications Engineer – DDR Design IP Job Location: San Jose, CA Job Description The Cadence IP team develops industry leading... Experience on memory subsystem verification and/or performance analysis Strong knowledge of ASIC flow, RTL design in Verilog...

Posted Date: 11 Oct 2025
Salary: $84000 - 156000 per year

Lead Applications Engineer – DDR Design IP

on memory subsystem verification and/or performance analysis · Knowledge of System Verilog and FPGA design · Knowledge.... As a Lead Technical Presales Engineer, you will use your knowledge of different memory interface standards to architect memory...

Posted Date: 05 Oct 2025
Salary: $102900 - 191100 per year

Design Verification Engineer

are a strong plus. Experience working with Emulators and FPGA based prototyping is a plus. Familiarity with overall chip design methodologies..., is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team...

Company: Broadcom
Location: San Jose, CA
Posted Date: 21 Nov 2025

Design Verification Engineer

are a strong plus. Experience working with Emulators and FPGA based prototyping is a plus. Familiarity with overall chip design methodologies..., is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team...

Company: Broadcom
Location: San Jose, CA
Posted Date: 21 Nov 2025

IC Design Engineer

Job Description: IC Design Engineer Participate in IP level architectural definition including micro-architecture... definition Perform RTL design using Verilog HDL, with an emphasis on performance and area Implement multi-power and low-power...

Company: Broadcom
Location: San Jose, CA
Posted Date: 19 Nov 2025

Sr. Design Verification Engineer

, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include... solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation...

Company: Prodapt
Location: San Jose, CA
Posted Date: 12 Nov 2025

Sr. Design Verification Engineer

, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up... services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design...

Company: Prodapt
Location: San Jose, CA
Posted Date: 11 Nov 2025

SerDes Applications Design Engineer

RESPONSIBILITIES: Excellent working knowledge of RTL-based design flows Strong knowledge of firmware and hardware interaction... FPGA design and prototyping for various MAC or PCS functionalities Working knowledge of the entire FPGA or ASIC design...

Posted Date: 08 Nov 2025

Staff Machine Learning Engineer

for our custom NPU. You are the engineer who will not only build our ML platform but also design the intelligent agents it deploys.... Collaborate with RTL designers to influence future NPU and FPGA architecture from an ML software perspective. Lead R&D on model...

Company: Axiado
Location: San Jose, CA
Posted Date: 19 Nov 2025
Salary: $80000 - 200000 per year

Senior Staff Emulation Engineer - ZEBU

, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include... solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design, UVM Verification, Emulation...

Company: Prodapt
Location: San Jose, CA
Posted Date: 12 Nov 2025

Senior Staff Emulation Engineer - ZEBU

, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up... services. We offer turnkey solutions, Offshore Design Centers (ODCs), and staff augmentation across key areas like RTL Design...

Company: Prodapt
Location: San Jose, CA
Posted Date: 11 Nov 2025

Embedded Adaptive Hardware Engineer

Design Engineer Location: San Jose, CA (Hybrid) Time Type: Full time Job Type: Regular Hiring Manager: Fang-Li Yuan... architecture, specifications, user guides, and design process Upgrading eFPGA architecture and RTL for the advanced features...

Company: Analog Devices
Location: San Jose, CA
Posted Date: 09 Nov 2025