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Keywords: FPGA Design , Location: San Jose, CA

Page: 1

FPGA Design & Validation Engineer

your career. THE ROLE: We are seeking a skilled FPGA Design and FPGA-Based Prototyping Platform Validation and Bring-Up... complex system prototypes. Design, implement, and optimize FPGA IPs in Verilog/SystemVerilog (or VHDL) for datacenter-class...

Posted Date: 11 Oct 2025

Software Architect FPGA

Own the technical roadmap for timing-centric EDA software tools within the FPGA design flow Build scalable, modular..._ THE ROLE: We are seeking a highly experienced and motivated FPGA Software Architect to join our team in a key individual...

Posted Date: 03 Oct 2025

FPGA Product Development

understanding of FPGA, IP, or ASIC design and verification processes. Hands-on experience with SystemVerilog, digital design... for a specific FPGA product line—starting from concept to post-silicon validation. The role centers on engineering ownership...

Posted Date: 01 Oct 2025

FPGA/ASIC Engineer

-million gate SoC designs onto prototyping platforms, creating design partitions, FPGA builds, and testbenches to simulate FPGA.... A comprehensive understanding of FPGA design, with proven expertise in partitioning multi-million gate designs across multiple FPGAs...

Company: Nesco Resource
Location: San Jose, CA
Posted Date: 17 Sep 2025
Salary: $60 - 65.33 per hour

Senior FPGA Engineer

. You will be responsible for design, analysis, implementation, and verification of FPGA and embedded processing for electro-mechanical systems... timing analysis Integrate FPGA design with embedded processors and other functional blocks in the system, including...

Company: Kforce
Location: San Jose, CA
Posted Date: 05 Sep 2025
Salary: $165000 - 195000 per year

FPGA Technical Program Manager

- RTL design, physical implementation, or circuit verification experience is desirable Internal customer relationship...

Posted Date: 05 Sep 2025

Senior Applications Engineer – DDR Design IP

, System Verilog and FPGA design Knowledge of AXI, DFI protocols Working knowledge of memory controller and memory PHY The... Applications Engineer – DDR Design IP Job Location: San Jose, CA Job Description The Cadence IP team develops industry leading...

Posted Date: 10 Oct 2025
Salary: $84000 - 156000 per year

Lead Applications Engineer – DDR Design IP

on memory subsystem verification and/or performance analysis · Knowledge of System Verilog and FPGA design · Knowledge... and designers · Write application notes, user guides, articles, design ideas, new product proposals, and evaluation kit...

Posted Date: 05 Oct 2025
Salary: $102900 - 191100 per year

Senior Applications Engineer – DDR Design IP

, System Verilog and FPGA design Knowledge of AXI, DFI protocols Working knowledge of memory controller and memory PHY The... Applications Engineer – DDR Design IP Job Location: San Jose, CA Job Description The Cadence IP team develops industry leading...

Posted Date: 04 Oct 2025
Salary: $84000 - 156000 per year

DSP or Serdes RTL Sr Principal Digital Design Engineer

and developing flows at all phases of the digital design and functional verification. It is further expected that the candidate... as well as a thorough understanding of the end-to-end digital design flow in order to accurately and efficiently collaborate...

Posted Date: 19 Jul 2025

Senior RTL Design Engineer

EXPERIENCE: Strong experience in designing digital components for high performance, low power SOC/FPGA. Design of digital... your career. THE ROLE: We are looking for a self-motivated senior design engineer to be part of a leading team to drive...

Posted Date: 08 Oct 2025

IP Design Engineer - AMDJP00004415

Strong in digital design, micro architecture , RTL development Working experience of Xilinx FPGA and Vivado Experience in Video domain...Job Title: IP Design Engineer Position is 100% remote Interview process is with MS Teams Client: Semiconductor...

Company: Seneca Resources
Location: San Jose, CA
Posted Date: 04 Oct 2025

Design Verification Engineer

Job Requirements Job Title: Design Verification Engineer Company: Quest Global Location: San Jose , CA Quest... Design Verification Engineer to join our team. Responsibilities: Design Verification of SOCs with embedded ARM CPUs, DSPs...

Company: Quest Global
Location: San Jose, CA
Posted Date: 27 Sep 2025

Senior Staff Hardware System Design Engineer

fast. Senior Staff Hardware System Design Engineer Mission: Perform detailed circuit design and analysis.... Responsibilities & opportunities in this role: Product‑Driven Design Leadership – Translate Product Requirement Documents (PRDs...

Company: Groq
Location: San Jose, CA
Posted Date: 26 Sep 2025

RTL Design Engineer

_ THE ROLE: We are seeking a Logic Design Expert with strengths in RTL and Timing and preferably with a background in DFx.... You have had significant success driving Design Methodologies, RTL, Timing and Architecture to tape out and production...

Posted Date: 25 Sep 2025

GPU Formal Design Verification Engineer

, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include... enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software services. We offer turnkey...

Company: Prodapt
Location: San Jose, CA
Posted Date: 24 Sep 2025

GPU Formal Design Verification Engineer

, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up... to top telecom and tech enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software...

Company: Prodapt
Location: San Jose, CA
Posted Date: 23 Sep 2025

System IP Design Verification Engineer

, UVM Verification, Emulation, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up... to top telecom and tech enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software...

Company: Prodapt
Location: San Jose, CA
Posted Date: 23 Sep 2025

System IP Design Verification Engineer

, FPGA Validation, DFT, RTL-to-GDSII, Physical Design, Mask Layout, and Silicon Bring-up. Our embedded services include... enterprises. Prodapt ASIC Services is a leading provider of SoC ASIC/FPGA and Embedded Software services. We offer turnkey...

Company: Prodapt
Location: San Jose, CA
Posted Date: 23 Sep 2025

Packaging Design Engineer

_ THE ROLE: The AMD Adaptive and Embedded Computing Group is seeking an experienced and self-motivated package design... families for the FPGA devices. The ideal candidate should have the ability to understand electrical requirements and translate...

Posted Date: 19 Sep 2025