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Keywords: Memory Layout Principal Engineer, Location: Bangalore, Karnataka

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Memory Layout Principal Engineer

Own the entire layout process for memory compilers and custom macros, including floorplanning, leaf-cell creation... layout reviews, mentor junior engineers, and promote best practices. Work with foundry teams and customers to define memory...

Company: Marvell
Posted Date: 10 Jan 2026

Principal Engineer - Memory Compiler Tiler/CAD

, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Principal Engineer - Tiler/CAD Work... across memory compilers, tiling, and Computer-Aided Design (CAD) to provide technical leadership and architectural vision...

Company: Marvell
Posted Date: 13 Jan 2026

Principal Engineer - Memory Compiler Circuit Design

Expect Essential Skills & Qualifications Technical: Custom memory circuit design (sense amps, periphery), analog/digital... development, foundry PDKs, memory characterization. Education: BSEE or related technical degree (MSEE often preferred). Role...

Company: Marvell
Posted Date: 14 Jan 2026

Principal Engineer, ASIC Development Engineering (IO and High‑Speed Design)

, and significant value creation from the information they manage. Job Description Principal Engineer will contribute to the design... with focus on quality and schedule. Collaborate with layout engineers by providing clear guidance, performing schematic‑layout...

Company: SanDisk
Posted Date: 21 Feb 2026

ASIC Principal Design Engineer

ASIC Principal Design Engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily... and system simulation, and builds physical implementations through development of multidimensional designs involving the layout...

Posted Date: 09 Feb 2026

Principal Engineer, VLSI Design Engineering (SOC Verification, System Verilog, UVM)

in Flash and advanced memory technologies, our solutions have become the beating heart of the digital world we’re living.... With our global reach, we ensure the global supply chain has access to the Flash memory it needs to keep our world moving forward...

Company: SanDisk
Posted Date: 21 Feb 2026

Principal Engineer

(2.4/5/6 GHz), DDR4/LPDDR memory, Ethernet, power, and thermal Drive and review schematic design, PCB layout, and SI/PI... Strong background in high-speed digital design, memory systems, power management, and thermal design Experience leading designs...

Company: Ericsson
Posted Date: 18 Feb 2026

Principal Engineer - SOC Clocking

of junior and senior designers. Review and approve specifications, schematics, simulations, and post-layout signoff for high.... Strong background in transistor-level design, spice simulations, and post-layout validation. Familiarity with EDA tools and scripting...

Company: Intel
Posted Date: 15 Jan 2026

Principal Engineer, Physical Design

timing analysis, reliability verification, static and dynamic power integrity, layout verification, electrical rule checking..., and Memory controller. Experience with System Verilog/SOC development environment. Experience in scripting languages (i.e. PERL...

Company: Intel
Posted Date: 15 Jan 2026