Role: Principal Engineer, RTL Design Location: Mountain View, CA (Onsite) Job Type: Contract Project... description The Principal Engineer, RTL Design within the NPU Hardware & Software organization, is a senior individual contributor...
Job Role: Principal Engineer, RTL Design Location: Mountain View, CA (Onsite) Duration: Long term contract Project... Description: The Principal Engineer, RTL Design within the NPU Hardware & Software organization, is a senior individual contributor...
Title: Principal Engineer (RTL Expert) Location: Sunnyvale, CA (Onsite role) Duration: Full-time/Perm... Required: Looking for RTL expert with 800G to 1.6T Ethernet controller expertise. Knowledge of Ultra Ethernet is a big plus. Must have 10-15...
Principal Physical Design Engineer This role has been designed as ‘Hybrid’ with an expectation that you will work... with HPE. Job Description: Job Description: Physical Design Flow and P&R Development Engineer (Innovus / Fusion Compiler...
Principal VLSI Design Engineer, Sunnyvale, CA This role has been designed as ‘’Onsite’ with an expectation... / ASIC Design Engineer (Networking ASICs) Role Summary You will architect, design, and implement complex networking ASICs...
Principal VLSI Design Engineer, Sunnyvale, CA This role has been designed as ‘’Onsite’ with an expectation... / ASIC Design Engineer (Networking ASICs) Role Summary You will architect, design, and implement complex networking ASICs...
Principal Physical Design Engineer This role has been designed as ‘Hybrid’ with an expectation that you will work... with HPE. Job Description: Job Description: Physical Design Flow and P&R Development Engineer (Innovus / Fusion Compiler...
ASIC Engineer Principal This role has been designed as ‘Hybrid’ with an expectation that you will work on average 2... & block-level Physical Design Engineer As a block-level and top-level SOC Physical Design Engineer, you will contribute...
As a Principal Silicon Engineer, you will serve as the middle-engineering technical leader at the intersection of RTL.... Bachelor of Science in Electrical or Computer Engineering. 8+ years of experience in RTL design and design checks (CDC/RDC/VCLP...
Role: Principal Engineer, AI Hardware Modeling Work location: Mountain View, CA Job Description: "The Principal... for an engineer with deep expertise in hardware modeling, emulation, and hardware-software co-design. This role provides expert-level...
"Possible 3 Month CTH | No Fees | Do Not Re-Post| Confidential TMR ID: UXT9RL Role: Principal Engineer, AI Hardware... for an engineer with deep expertise in hardware modeling, emulation, and hardware-software co-design. This role provides expert-level...