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Keywords: Senior SoC Verification Methodology Engineer, Location: Santa Clara, CA

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Senior SoC Verification Methodology Engineer

We are looking for a Senior Verification Infrastructure Engineer to join the SoC verification team at NVIDIA... best practices in verification methodology, scalability, performance optimization, and debuggability Support bring-up and debug...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 15 Jan 2026

Custom SOC IP Verification Engineer

NVIDIA is seeking a Senior Custom SOC/IP Verification Engineer to verify the next generation SoC and IP solutions... a skilled ASIC Verification Engineer with expertise in cache coherency protocols and AMBA-based interconnects (AXI, ACE, CHI...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 21 Feb 2026

Senior VLSI Library Methodology Engineer

Methodology Engineer to architect automation that powers library modeling, quality checks, and release for NVIDIA’s PD flows... to do their best work. Come join the team and see how you can make a lasting impact on the world. We’re seeking a Senior VLSI Library...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 17 Dec 2025

Senior RTL Analysis Methodology Engineer

Engineer to join our Logic Design Implementation team. The team develops and supports static RTL verification methodologies... Crowd: Hands-on experience with RTL, whether as a designer, verification engineer, or similar role. Proven experience...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 29 Jan 2026

Senior Digital Design Verification Engineer - Hardware

We're now looking for a Senior Digital Design Verification Engineer! NVIDIA has continuously reinvented itself over two... to join our diverse team today! As a Senior Digital Design Verification Engineer at NVIDIA, you'll verify the design and implementation...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 25 Feb 2026

Senior Memory Controller Verification Engineer

NVIDIA is seeking hardworking, motivated and creative Senior Verification Engineer for our Tegra SoC Memory Subsystem... like Debussy, GDB). Background with System Verilog and UVM based methodology for ASIC verification. Ways to stand out from the...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 22 Jan 2026

Design Verification Engineer, Senior Principal

across multiple programs. 2. Organization‑Level Impact Influence verification methodology and tooling beyond a single project... of leading Design Verification implementation activity. Tape-out of complex SOC under tight schedule. In depth understanding...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 01 Mar 2026

Design Verification Engineer - Senior Principal

of experience. Strong background in SoC verification and test bench development using UVM, System Verilog, C/C++, and DPI.... Strong verification skills, understanding of methodology (object oriented programming, white-box/black-box, directed/random testing...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 08 Mar 2026

Senior Staff Verification Engineer

++, and DPI. - Verification at different levels of hierarchy, including block/unit, subsystem, and SOC levels. - Working closely..., and scalable. - Background in SOC verification and test bench development using UVM and System Verilog, object-oriented...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 27 Feb 2026
Salary: $134390 - 201300 per year

Lead Design Verification Engineer

Job Details: Job Description: Job Description Intel is seeking a highly technical Lead Design Verification Engineer... IPs, designed to scale across multiple product families. You will establish verification strategy and methodology, drive...

Company: Intel
Location: Santa Clara, CA
Posted Date: 26 Feb 2026

Design Verification Engineer, Principal

across multiple programs. 2. Organization‑Level Impact Influence verification methodology and tooling beyond a single project... of leading Design Verification implementation activity. Tape-out of complex SOC under tight schedule. In depth understanding...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 01 Mar 2026
Salary: $158600 - 237600 per year

Design Verification Engineer

and other contributions to verification methodology As an overall product owner, responsible for architecture analysis and technical...: Developed and implemented SystemVerilog and UVM (Universal Verification Methodology) based testbenches, simulation environments...

Posted Date: 28 Jan 2026

Senior Digital Design Engineer

We are looking for a Senior Digital Design Engineer to join our Semi-Custom Silicon products group. In this role... block. Collaborate with chip architects, verification engineers, formal verification engineers, and SoC integration...

Company: Nvidia
Location: Santa Clara, CA
Posted Date: 23 Jan 2026

Senior Principal Engineer, Physical Design

opportunity to work on both the physical design and methodology for future designs of our next-generation, high-performance... Expect As a senior leader in the central physical design team, you will: Shape the long-term vision for physical design...

Company: Marvell
Location: Santa Clara, CA
Posted Date: 13 Dec 2025