VLSI Technical engineer with 12-15 years of experience in IP/Subsystem/SoC Level Functional verification He/she... should have strong knowledge of following Working experience in IP / Subsystem/ SoC verification Expertise to develop verification environments...
efficiency Mentor junior engineers to build a high performing team PREFERRED EXPERIENCE: Proficient in SoC/sub-system/IP... your career. SENIOR SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build, and execute the verification...
/MTECH/MS or equivalent in ECE/EEE/CSE ~5-10 years of strong DV experience in IP, Sub System & SOC Verification, IP... your career. SENIOR SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: Security DV ): Work on SOC level...
or equivalent in ECE/EEE/CSE 5-10 years of strong DV experience in CLK, RST verification, NLP simulation, IP, Sub System & SOC... your career. SENIOR SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: SOC CLK RST & Power Management): Work on SOC...
/MTECH/MS or equivalent in ECE/EEE/CSE 8-12 years of strong DV experience in CLK, RST verification, NLP simulation, IP, Sub... your career. MTS SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: SOC DDR, UMC): Work on SOC level verification...
performing team PREFERRED EXPERIENCE: Proficient in SoC/sub-system/IP level ASIC verification Proficient in debugging... your career. SENIOR SILICON DESIGN ENGINEER (ASIC - SoC Design Verification Lead) THE ROLE: The focus of this role...
efficiency Mentor junior engineers to build a high performing team PREFERRED EXPERIENCE: Proficient in SoC/sub-system/IP..._ SENIOR SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build, and execute the verification of new...
of strong DV experience in IP, Sub System & SOC Verification, IP deployment/integration. #LI-RR1 #LI-Hybrid Benefits offered... to person for SOC verification/Concurrency/Coherency/Consistency/System level understanding/IP deployment/integration activities...
your career. SDE/MTS/SMTS SILICON DESIGN ENGINEER THE ROLE (SOC Verification Engineer: GDP DV ): Work on SOC level... is a plus. ACADEMIC CREDENTIALS: BE/B.Tech/ME/MTECH/MS or equivalent in ECE/EEE/CSE ~5-10 years of strong DV experience in IP, Sub...
Very good knowledge of Verilog/System Verilog and UVM. Candidate should have worked on IP verification - component.... 2. Ability to code module / sub system test bench components (scoreboard, agents, sequences), coverage model...
Very good knowledge of Verilog/System Verilog and UVM. Candidate should have worked on IP verification - component.... 2. Ability to code module / sub system test bench components (scoreboard, agents, sequences), coverage model...
Experience in verification at Unit/Sub-system/SOC level and expertise in Verilog and SystemVerilog Expertise in comprehensive...: Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub...
Experience in verification at Unit/Sub-system/SOC level and expertise in Verilog and SystemVerilog Expertise in comprehensive...: Be responsible for verification of the ASIC design, architecture, golden models and micro-architecture of PCIE controllers at IP/sub...
and ability to gel well within a team Good communication skills PREFERRED EXPERIENCE: Proficient in SoC/sub-system/IP level... your career. SENIOR SILICON DESIGN ENGINEER THE ROLE: The focus of this role is to plan, build, and execute the verification...
verification. Ability to create IP level module and sub-system verification plans, TBs, portable test benches, sequences... IP level Design and Verification (DV) environments, craft highly reusable best-in-class UVM TB, implement effective...