to life cutting-edge designs. You will lead a front-end design and integration team, working closely with the architecture, IP... with the IP/SoC team. KEY RESPONSIBLITIES: Design of IP and subsystems with integration of AMD and other 3rd party IPs...
ideal candidate will have experience developing RTL for IP or subsystems and understand architectural specifications... with the IP/SoC team. KEY RESPONSIBLITIES: Design of IP and subsystems with integration of AMD and other 3rd party IPs...
will have experience leading a team verifying RTL for IP or subsystems and understand architectural specifications. Responsibilities..., you will help bring to life cutting-edge designs. You will lead a front-end design verification team, and work closely...
Responsibilities Micro-architecture and RTL design for IP Cores / subsystems. Work in close coordination with Systems, Verification... General Summary: Job Description This role offers a position in system power management IP cores and subsystem design...
processor based subsystems Designing smaller IP blocks for SOC Integrating NOC, Processor, DMA, PCI, Ethernet... (Electronics and Communication) 10 to 15 years of hands on Experience in RTL design using (VHDL/Verilog) Experience...
in Electrical Engineering or Computer Science, with 7+ years of experience on IP/Sub-System RTL Design. Experience in testbench...&D teams such as Verification, digital IP, Design Enablement, Emulation, and Validation to achieve project milestones. Promote...
Lead front-end development of digital IP blocks / subsystems from concept through implementation. Drive design signoff...: Silicon Design Engineering / RTL Design Employment Type: Full-time Experience: 6 8 years (Lead Engineer) Notice Period...
Job Title: Design Lead Engineer Mid Senior (ASIC / SoC RTL) Experience: 6 8 Years Location: Bengaluru Employment... Type: Full-time Job Summary We are seeking an experienced Design Lead Engineer Mid Senior to architect, implement, and lead RTL...
Job Title: Design Lead (Mid Level) Engineer (ASIC / SoC RTL) Experience: 4 6 Years Location: Bengaluru Employment... Type: Full-time Job Summary We are looking for a Design Lead (Mid-Level) Engineer with strong RTL design expertise...
is looking for an experienced Digital Design Lead who will be responsible for providing technical leadership to the digital design team... design management infrastructure and flows across Methodics, Perforce, GitHub, and IP catalog systems Develop and maintain...
RTL Design Lead We Are: At Synopsys, we drive the innovations that shape the way we live and connect. Our technology... is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design...
) RTL design of digital IP blocks and systems in Verilog/SystemVerilog Experience in technical project/task leadership... in MCU/CPU subsystems like ARM processor Experience is design techniques like Pipelining, Low latency, Power optimization...
& Own Verification Strategy: Define end-to-end verification architecture for interface PHY IP and subsystems, aligning test... of innovation. As a Fellow-level Verification Architect, you will define and lead the verification architecture and methodology...
, DSP), AMBA bus protocols (AHB/APB). RTL design of digital IP blocks and systems in Verilog/SystemVerilog Technical... development with the software team Lead project activities Contribute to design methodology and design flow improvements...
. Position Requirements Experience working with UCIe, PCIe, Ethernet, 112G or similar interface IP. Verilog RTL design.... Job Title: Lead Product Engineer Location: Bangalore About Us Cadence is a pivotal leader in electronic design, building...
with RTL design, architecture, and full-chip verification teams to ensure first-pass silicon success. The position aligns..., Architecture & Full-Chip Verification Teams Partner with RTL designers and SoC architects to understand design intent...
Ownership Lead RTL-to-gate-level synthesis for NPU IP and subsystems using industry-standard tools (Synopsys Design Compiler... for driving synthesis and timing closure for Neural Processing Unit (NPU) IP and subsystems in cutting-edge SoCs. This role...
in at least one of: RTL design & microarchitecture Complex IP verification (DV) DDR5/GDDR/HBM/PCIe/Highspeed protocols Firmware.../validation or design direction across complex subsystems or entire product lines. Institutionalize signoff methodology rigor...
with architects, RTL designers, DV, firmware, board design, program management, and IP/tool providers to align execution... program milestones. Lead reviews, set technical direction, and ensure rigorous validation coverage across domains. Leverage...
digital logic design. Key Responsibilities Lead RTL design and micro-architecture development for memory interface digital... blocks and subsystems. Own end-to-end design flow: specification → microarchitecture → RTL coding → work with PnR team...