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Keywords: ASIC Architect, Location: San Jose, CA

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ASIC Architect

& parallel chain-of-thought reasoning agents. Job Summary We are seeking a talented Computer Architect..., Computer Engineering, or related field 5+ years of experience in computer architecture, ASIC design, or related fields...

Company: Etched
Location: San Jose, CA
Posted Date: 07 Aug 2025

ASIC Engineer 2

mixed-signal ASICs Responsibilities: Work with system architect to define micro-architecture and RTL development..., Bachelor's degree in CS/EE is required. 1+ years of relevant experience in ASIC design field. Solid ASIC/FPGA design (micro...

Company: Nokia
Location: San Jose, CA
Posted Date: 24 Sep 2025

Senior ASIC Design Verification Engineer

to talk to you. What you’ll do: As a Senior ASIC Design Verification Engineer, you will be responsible for verifying..., and targeted assertions to ensure design correctness and coverage. Architect and execute verification strategies encompassing test...

Company: Persimmons
Location: San Jose, CA
Posted Date: 24 Aug 2025

Software Architect FPGA

_ THE ROLE: We are seeking a highly experienced and motivated FPGA Software Architect to join our team in a key individual... optimally with different teams across AMD. KEY RESPONSIBILITIES: Design and architect software systems specifically...

Posted Date: 04 Oct 2025

Senior Applications Engineer – DDR Design IP

, you will use your knowledge of different memory interface standards to architect memory solutions for customers using Cadence DDR... Experience on memory subsystem verification and/or performance analysis Strong knowledge of ASIC flow, RTL design in Verilog...

Posted Date: 05 Oct 2025
Salary: $84000 - 156000 per year

Lead Applications Engineer – DDR Design IP

. As a Lead Technical Presales Engineer, you will use your knowledge of different memory interface standards to architect memory... and synthesis tools · Strong knowledge of ASIC flow, RTL/Verilog · Individual leadership and initiative to manage pre-sales...

Posted Date: 05 Oct 2025
Salary: $102900 - 191100 per year

Senior Staff Hardware System Design Engineer

overall product strategy. High‑Speed Interface Engineering – Architect and validate SerDes, PCIe, DDR, and other high... them with CPLDs/FPGAs using Verilog to support board‑level control and diagnostics. ASIC Bring‑Up & Validation – Lead the...

Company: Groq
Location: San Jose, CA
Posted Date: 26 Sep 2025

Technical Staff Engineer - Architecture (System Interconnect)

Interconnect Architect to join our dynamic team. The successful candidate will be responsible for leading cross-functional teams...-functional teams to deliver high-performance IP integrations into Microchip FPGA products Work on ASIC & FPGA IP development...

Company: Microchip
Location: San Jose, CA
Posted Date: 23 Sep 2025

IC Verification Engineer

Job duties include: · Architect and develop scalable and reusable Testbench environment using the framework... Environments, developing Test plans, Functional coverage and pseudo-random testing · Must have gone through a full ASIC cycle...

Company: Broadcom
Location: San Jose, CA
Posted Date: 11 Sep 2025

DFT Engineer

of experience in ASIC DFT development for serial high-speed data center networking. Experience as a DFT architect for chip...

Company: Broadcom
Location: San Jose, CA
Posted Date: 03 Sep 2025
Salary: $120000 - 192000 per year

Lead Principal Electrical Design Engineer

and interface/load boards. Architect high-performance analog circuits, power supplies, and FPGA-based solutions. Conduct design... to post-release design enhancements and issue resolution. Experience with FPGA/ASIC design using HDL (Verilog/VHDL and System...

Company: Micron
Location: San Jose, CA
Posted Date: 19 Aug 2025

Functional Verification Engineer - Applying LLMs for Chip Design

advanced AI tools to architect, design, and validate the next generation of verification methodologies. You will collaborate... in Electrical Engineering, Computer Engineering, or related field. Proven expertise in digital design (RTL/FPGA/ASIC...

Company: ChipStack
Location: San Jose, CA
Posted Date: 12 Aug 2025

Senior Analog/mixed-signal IC Design Engineer - Acacia

that will integrate into the ASIC. Our team interacts with other Acacia groups including digital/DSP design, system design, package design..., and module design. Your Impact You will architect, design, layout, measure and productize ultra-deep sub-micron-based CMOS...

Company: Cisco Systems
Location: San Jose, CA
Posted Date: 06 Aug 2025